<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/scripts/dtc/include-prefixes/riscv, branch v6.6.131</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.131</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.131'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2023-03-27T20:45:22+00:00</updated>
<entry>
<title>dts: add riscv include prefix link</title>
<updated>2023-03-27T20:45:22+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2023-03-20T00:52:46+00:00</published>
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<id>urn:sha1:a3eebcb61ffb9a26ca77a00ce80050cff0f0ecf3</id>
<content type='text'>
The Allwinner D1/D1s SoCs (with a RISC-V core) use an (almost?) identical
die as their R528/T113-s siblings with ARM Cortex-A7 cores.

To allow sharing the basic SoC .dtsi files across those two
architectures as well, introduce a symlink to the RISC-V DT directory.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20230320005249.13403-2-andre.przywara@arm.com
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
</content>
</entry>
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