<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/uapi/drm/drm_fourcc.h, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-08-21T20:29:42+00:00</updated>
<entry>
<title>drm/fourcc: define Intel Xe2 related tile4 ccs modifiers</title>
<updated>2024-08-21T20:29:42+00:00</updated>
<author>
<name>Juha-Pekka Heikkila</name>
<email>juhapekka.heikkila@gmail.com</email>
</author>
<published>2024-08-16T11:52:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5151fa35ae5979821d091b80096b4c790b187bac'/>
<id>urn:sha1:5151fa35ae5979821d091b80096b4c790b187bac</id>
<content type='text'>
Add Tile4 type ccs modifiers to indicate presence of compression on Xe2.
Here is defined I915_FORMAT_MOD_4_TILED_LNL_CCS which is meant for
integrated graphics with igpu related limitations
Here is also defined I915_FORMAT_MOD_4_TILED_BMG_CCS which is meant
for discrete graphics with dgpu related limitations

Signed-off-by: Juha-Pekka Heikkila &lt;juhapekka.heikkila@gmail.com&gt;
Reviewed-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Acked-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20240816115229.531671-3-juhapekka.heikkila@gmail.com
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizes</title>
<updated>2024-07-01T20:10:47+00:00</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2024-06-01T23:53:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8dd1426e2c80e32ac1995007330c8f95ffa28ebb'/>
<id>urn:sha1:8dd1426e2c80e32ac1995007330c8f95ffa28ebb</id>
<content type='text'>
It verified GFX9-11 swizzle modes on GFX12, which has undefined behavior.

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitions</title>
<updated>2024-07-01T20:10:46+00:00</updated>
<author>
<name>Marek Olšák</name>
<email>marek.olsak@amd.com</email>
</author>
<published>2024-06-01T18:56:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8d9ffd15ff5c9da7bc6171f2536aaaff40bcab6e'/>
<id>urn:sha1:8d9ffd15ff5c9da7bc6171f2536aaaff40bcab6e</id>
<content type='text'>
They were added accidentally.

Signed-off-by: Marek Olšák &lt;marek.olsak@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: GFX12 changes for converting tiling flags to modifiers</title>
<updated>2024-04-26T21:22:58+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2024-03-05T19:38:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=96557f785a7701c7e0c327bd25b701d0eb5dcee0'/>
<id>urn:sha1:96557f785a7701c7e0c327bd25b701d0eb5dcee0</id>
<content type='text'>
GFX12 swizzle mode and GCC formats changed and is much simpler. Use a
seperate function for the same. Changes:

* Swizzle mode is now 3 bits only
* DCC enablement doesn't come from tiling_flags, it is always set in modifiers
* DCC max compressed block size of 128B

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add gfx12 swizzle mode defs</title>
<updated>2024-04-26T21:22:45+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2024-02-02T19:00:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7ceb94e87bffff7c12b61eb29749e1d8ac976896'/>
<id>urn:sha1:7ceb94e87bffff7c12b61eb29749e1d8ac976896</id>
<content type='text'>
Add GFX12 swizzle mode definitions for use with DCN401

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/fourcc: fix spelling/typos</title>
<updated>2023-12-13T15:19:00+00:00</updated>
<author>
<name>Randy Dunlap</name>
<email>rdunlap@infradead.org</email>
</author>
<published>2023-12-13T04:39:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c4c5391adae2c5a328232bb4fecd9510310b2fdf'/>
<id>urn:sha1:c4c5391adae2c5a328232bb4fecd9510310b2fdf</id>
<content type='text'>
Correct spelling mistakes that were identified by codespell.

Signed-off-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Cc: David Airlie &lt;airlied@gmail.com&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Reviewed-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Maxime Ripard &lt;mripard@kernel.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231213043925.13852-1-rdunlap@infradead.org
</content>
</entry>
<entry>
<title>drm/fourcc: Add NV20 and NV30 YUV formats</title>
<updated>2023-10-24T19:34:35+00:00</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-10-23T17:37:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=728c15b4b5f3369cbde73d5e0f14701ab370f985'/>
<id>urn:sha1:728c15b4b5f3369cbde73d5e0f14701ab370f985</id>
<content type='text'>
DRM_FORMAT_NV20 and DRM_FORMAT_NV30 formats is the 2x1 and non-subsampled
variant of NV15, a 10-bit 2-plane YUV format that has no padding between
components. Instead, luminance and chrominance samples are grouped into 4s
so that each group is packed into an integer number of bytes:

YYYY = UVUV = 4 * 10 bits = 40 bits = 5 bytes

The '20' and '30' suffix refers to the optimum effective bits per pixel
which is achieved when the total number of luminance samples is a multiple
of 4.

V2: Added NV30 format

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Sandy Huang &lt;hjc@rock-chips.com&gt;
Reviewed-by: Christopher Obbard &lt;chris.obbard@collabora.com&gt;
Tested-by: Christopher Obbard &lt;chris.obbard@collabora.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-2-jonas@kwiboo.se
</content>
</entry>
<entry>
<title>drm/fourcc: define Intel Meteorlake related ccs modifiers</title>
<updated>2023-05-15T08:33:12+00:00</updated>
<author>
<name>Juha-Pekka Heikkila</name>
<email>juhapekka.heikkila@gmail.com</email>
</author>
<published>2023-05-14T18:42:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c7c12de893f808bd7c1215fe9056262295e5203b'/>
<id>urn:sha1:c7c12de893f808bd7c1215fe9056262295e5203b</id>
<content type='text'>
Add Tile4 type ccs modifiers with aux buffer needed for MTL

Bspec: 49251, 49252, 49253
Cc: dri-devel@lists.freedesktop.org
Cc: Jani Nikula &lt;jani.nikula@linux.intel.com&gt;
Signed-off-by: Juha-Pekka Heikkila &lt;juhapekka.heikkila@gmail.com&gt;
Reviewed-by: Matt Atwood &lt;matthew.s.atwood@intel.com&gt;
Acked-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20230514184240.6184-1-juhapekka.heikkila@gmail.com
</content>
</entry>
<entry>
<title>drm/fourcc: Document open source user waiver</title>
<updated>2023-01-05T12:10:38+00:00</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2022-11-23T19:24:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b357e7ac1b7349befaeded273b775c7af23a538b'/>
<id>urn:sha1:b357e7ac1b7349befaeded273b775c7af23a538b</id>
<content type='text'>
It's a bit a FAQ, and we really can't claim to be the authoritative
source for allocating these numbers used in many standard extensions
if we tell closed source or vendor stacks in general to go away.

Iirc this was already clarified in some vulkan discussions, but I
can't find that anywhere anymore. At least not in a public link.

Cc: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Cc: David Airlie &lt;airlied@gmail.com&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Cc: Daniel Stone &lt;daniel@fooishbar.org&gt;
Cc: Bas Nieuwenhuizen &lt;bas@basnieuwenhuizen.nl&gt;
Cc: Jason Ekstrand &lt;jason@jlekstrand.net&gt;
Cc: Neil Trevett &lt;ntrevett@nvidia.com&gt;
Acked-by: Daniel Stone &lt;daniels@collabora.com&gt;
Acked-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
Acked-by: David Airlie &lt;airlied@gmail.com&gt;
Acked-by: Marek Olšák &lt;maraeo@gmail.com&gt;
Acked-by: Bas Nieuwenhuizen &lt;bas@basnieuwenhuizen.nl&gt;
Acked-by: Jason Ekstrand &lt;jason.ekstrand@collabora.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20221123192437.1065826-1-daniel.vetter@ffwll.ch
</content>
</entry>
<entry>
<title>drm/fourcc: add Vivante tile status modifiers</title>
<updated>2022-10-06T17:04:20+00:00</updated>
<author>
<name>Lucas Stach</name>
<email>l.stach@pengutronix.de</email>
</author>
<published>2022-09-09T09:30:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=43d3f3b94efc134317d40ec7c69ae1180ed5ac9c'/>
<id>urn:sha1:43d3f3b94efc134317d40ec7c69ae1180ed5ac9c</id>
<content type='text'>
The tile status modifiers can be combined with all of the usual
color buffer modifiers. When they are present an additional plane
is added to the surfaces to share the tile status buffer. The
TS modifiers describe the interpretation of the tag bits in this
buffer.

Signed-off-by: Lucas Stach &lt;l.stach@pengutronix.de&gt;
Reviewed-by: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Reviewed-by: Guido Günther &lt;agx@sigxcpu.org&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220909093000.3458413-1-l.stach@pengutronix.de
</content>
</entry>
</feed>
