Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v5.2.13 2019-04-12T16:27:57+00:00 2019-04-12T16:27:57+00:00 Chunming Zhou david1.zhou@amd.com 2019-04-01T09:51:00+00:00 urn:sha1:2624dd154bcc53ac2de16ecae9746ba867b6ca70 syncobj wait/signal operation is appending in command submission. v2: separate to two kinds in/out_deps functions v3: fix checking for timeline syncobj Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Cc: Tobias Hector <Tobias.Hector@amd.com> Cc: Jason Ekstrand <jason@jlekstrand.net> Cc: Dave Airlie <airlied@redhat.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-03-19T20:36:51+00:00 xinhui pan xinhui.pan@amd.com 2018-12-17T07:09:07+00:00 urn:sha1:5cb771143ed9552c672b6e1d6a3005a435b54e44 Add a query for userspace to check which RAS features are enabled. v2: squash in warning fix Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-03-19T20:36:51+00:00 xinhui pan xinhui.pan@amd.com 2018-12-17T06:31:12+00:00 urn:sha1:ae363a212b145a0d4e0507e26e6c1b937181ec34 Add AMDGPU_CTX_QUERY2_FLAGS_RAS_CE/UE which indicate if any error happened between previous query and this query. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-03-19T20:36:50+00:00 xinhui pan xinhui.pan@amd.com 2018-11-20T02:22:36+00:00 urn:sha1:9b9ca62ddeec541bc7633410dacccefd96f0cc68 Output the ta fw, aka xgmi/ras, via debugfs. Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-02-15T16:15:43+00:00 Bas Nieuwenhuizen bas@basnieuwenhuizen.nl 2019-01-30T01:53:22+00:00 urn:sha1:b5bb37eddb63b16b7ab959598d108b1c444be77d Given a master fd we can then override the priority of the context in another fd. Using these overrides was recommended by Christian instead of trying to submit from a master fd, and I am adding a way to override a single context instead of the entire process so we can only upgrade a single Vulkan queue and not effectively the entire process. Reused the flags field as it was checked to be 0 anyways, so nothing used it. This is source-incompatible (due to the name change), but ABI compatible. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-02-06T02:15:46+00:00 Marek Olšák marek.olsak@amd.com 2019-01-21T22:22:55+00:00 urn:sha1:41cca166cc57e75e94d888595a428d23a3bf4e36 I'm not increasing the DRM version because GDS isn't totally without bugs yet. v2: update emit_ib_size Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2019-02-06T02:15:46+00:00 Andrey Grodzovsky andrey.grodzovsky@amd.com 2019-01-31T20:44:22+00:00 urn:sha1:67dd1a36334ffce82bebeb2d633e152aa436d370 New chunk for dependency on start of job's execution instead on the end. This is used for GPU deadlock prevention when userspace uses mid-IB fences to wait for mid-IB work on other rings. v2: Fix typo in AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES v3: Bump KMS version v4: put old fence AFTER acquiring the scheduled fence. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Christian Koenig <Christian.Koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-11-05T19:21:12+00:00 Nicholas Kazlauskas nicholas.kazlauskas@amd.com 2018-10-23T14:04:54+00:00 urn:sha1:ce331f8f7c04186b7b130550250d9c4e752b4f8f [Why] Hardware support for Delta Color Compression (DCC) decompression is available in DC for GFX9 but there's no way for userspace to enable the feature. Enabling the feature can provide improved GFX performance and power savings in many situations. [How] Extend the GFX9 tiling flags to include DCC parameters. These are logically grouped together with tiling flags even if they are technically distinct. This trivially maintains backwards compatibility with existing users of amdgpu_gem_metadata. No new IOCTls or data structures are needed to support DCC. This patch helps expose DCC attributes to both libdrm and amdgpu_dm. Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-09-14T14:37:43+00:00 David Francis David.Francis@amd.com 2018-09-13T19:37:50+00:00 urn:sha1:4d11b4b256a882800e033e003351244ae7d5d174 DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2018-07-16T20:29:47+00:00 Andrey Grodzovsky andrey.grodzovsky@amd.com 2018-07-06T18:16:54+00:00 urn:sha1:964d0fbf6301d3dc8dfad19ffab5a06d002d27f1 This change is to support MESA performace optimization. Modify CS IOCTL to allow its input as command buffer and an array of buffer handles to create a temporay bo list and then destroy it when IOCTL completes. This saves on calling for BO_LIST create and destry IOCTLs in MESA and by this improves performance. v2: Avoid inserting the temp list into idr struct. v3: Remove idr alloation from amdgpu_bo_list_create. Remove useless argument from amdgpu_cs_parser_fini Minor cosmetic stuff. v4: Revert amdgpu_bo_list_destroy back to static Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>