kernel/linux.git/include/sound/sof/ipc4/header.h, branch v6.6.131

ASoC: SOF: ipc4: Add macros for chain-dma message bits

2023-03-21T12:13:30+00:00

In the chained DMA mode, the firmware allocates buffers for the host and link DMA, and takes care of copying data between host- and link-DMA buffers in a low-latency thread. This is different to a regular pipeline, no processing is allowed, and the connection between host- and link DMA is handled with a dedicated IPC. This patch exposes the macros needed to create the required IPC messages. Signed-off-by: Jyri Sarha Reviewed-by: Rander Wang Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20230321092654.7292-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4: Add macro to set the core_id in create_pipe message

2023-03-07T13:58:12+00:00

The create pipeline message can carry the target code_id which is set to 0 at the moment. Add macros to set the core_id in the message extension. Signed-off-by: Peter Ujfalusi Reviewed-by: Pierre-Louis Bossart Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20230307123556.31328-2-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4-pcm: Use the PCM stream's pipeline_info during trigger

2023-01-27T12:14:07+00:00

Use the list of pipelines in the PCM stream's pipeline info to trigger the pipelines in the right order. Add a helper for triggering pipelines in batch mode that will be used to trigger multiple pipelines at the same time. Signed-off-by: Ranjani Sridharan Reviewed-by: Libin Yang Reviewed-by: Pierre-Louis Bossart Reviewed-by: Péter Ujfalusi Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20230127120031.10709-12-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Intel: Add ipc4 library loading implementation

2022-10-21T12:05:07+00:00

On Intel HDA platforms the library loading is done via DMA and an IPC message is also need to be sent to initiate the downloading of the new library. Co-developed-by: Ranjani Sridharan Signed-off-by: Ranjani Sridharan Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Pierre-Louis Bossart Reviewed-by: Chao Song Reviewed-by: Kai Vehmanen Link: https://lore.kernel.org/r/20221020121238.18339-16-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4: Add macro to get core ID from log buffer status message

2022-09-09T17:48:45+00:00

The LOG_BUFFER_STATUS message includes the ID of the core which updated its log buffer. With IPC4 each core logs to a different slot in the debug window. Signed-off-by: Peter Ujfalusi Reviewed-by: Pierre-Louis Bossart Reviewed-by: Rander Wang Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220909114332.31393-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: ipc4: Add set_core_state pm_ops implementation

2022-06-10T12:31:41+00:00

IPC4 uses the SET_DX message to enable/disable cores managed by the DSP. The dx_state.core_mask indicates which core is going to change state, the dx_state.dx_mask is to power on (1) or off (0) the core. In the dx_mask only those bits (cores) checked which bit is set in the core_mask, other bits (cores) ignored. Signed-off-by: Peter Ujfalusi Reviewed-by: Ranjani Sridharan Reviewed-by: Bard Liao Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220610083549.16773-5-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown

ASoC: SOF: Add initial header file for ipc4

2022-05-05T12:24:44+00:00

The header file contains essential structure definitions, description of bit fields and bits in the ipc4 header and an internally used ipc4 message container definition. Signed-off-by: Peter Ujfalusi Reviewed-by: Bard Liao Reviewed-by: Rander Wang Reviewed-by: Pierre-Louis Bossart Reviewed-by: Ranjani Sridharan Link: https://lore.kernel.org/r/20220505094818.10346-3-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown