kernel/linux.git/include/soc/tegra/pmc.h, branch v7.2-rc6

soc/tegra: pmc: fix #ifdef block in header

2026-06-22T06:52:46+00:00

When build testing on ARM without the PMC driver, the other drivers fail to link: ld.lld: error: undefined symbol: tegra_pmc_core_domain_state_synced >>> referenced by regulators-tegra30.c >>> drivers/soc/tegra/regulators-tegra30.o:(tegra30_regulator_balance_voltage) in archive vmlinux.a >>> referenced by regulators-tegra20.c >>> drivers/soc/tegra/regulators-tegra20.o:(tegra20_core_rtc_update) in archive vmlinux.a Adapt the checks in the header to cover both cases on other architectures and without PMC. Fixes: 8318af5dd29c ("soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard") Signed-off-by: Arnd Bergmann Signed-off-by: Thierry Reding

soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard

2026-05-31T05:21:14+00:00

None of this legacy code is needed on 64-bit ARM devices, so it can be moved behind a corresponding preprocessor guard. This more cleanly separates out the legacy code from code needed on current platforms. Acked-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: pmc: Remove unused legacy functions

2026-05-31T05:21:14+00:00

All callers of these functions have been replaced by their variants taking a PMC context as an input, so they are no longer used and can be removed. Acked-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: pmc: Add PMC contextual functions

2026-01-18T07:48:30+00:00

Add implementations that take as argument a struct tegra_pmc * for most public APIs, as well as a function to obtain the PMC for any given device. This will allow transitioning away users from relying on a global variable storing the PMC context. Signed-off-by: Thierry Reding

soc/tegra: pmc: Remove some old and deprecated functions and constants

2024-02-01T14:58:04+00:00

These TEGRA_IO_RAIL_... functions and constants have been deprecated in commit 21b499105178 ("soc/tegra: pmc: Add I/O pad voltage support") in 2016-11. There seems to be no users since kernel 4.16. Remove them now. Signed-off-by: Christophe JAILLET Signed-off-by: Thierry Reding

soc/tegra: pmc: Add I/O pad table for Tegra234

2022-11-10T01:21:12+00:00

Add I/O pad table for Tegra234 to allow configuring DPD mode and switching the pins to 1.8V or 3.3V as needed. On Tegra234, DPD registers are reorganized such that there is a DPD_REQ register and a DPD_STATUS register per pad group. Update the PMC driver accordingly. While at it, use the generated tables from tegra-pinmux-scripts to make the formatting of these tables more consistent. Signed-off-by: Petlozu Pravareshwar [treding@nvidia.com: generate tables from tegra-pinmux-scripts] Signed-off-by: Thierry Reding

soc/tegra: pmc: Add driver state syncing

2021-06-02T08:58:55+00:00

Add driver state syncing that is invoked once all PMC consumers are attached and ready. The consumers are the power domain clients. The synchronization callback is invoked once all client drivers are probed, the driver core handles this for us. This callback informs PMC driver that all voltage votes are initialized by each PD client and it's safe to begin voltage scaling of the core power domain. Signed-off-by: Dmitry Osipenko Reviewed-by: Ulf Hansson [treding@nvidia.com: squash DT backwards-compatibility patch] Signed-off-by: Thierry Reding

soc: tegra: fix tegra_pmc_get_suspend_mode definition

2020-04-17T15:20:44+00:00

When CONFIG_PM_SLEEP is disabled, the function is not defined, causing a link failure: arm-linux-gnueabi-ld: drivers/cpuidle/cpuidle-tegra.o: in function `tegra_cpuidle_probe': cpuidle-tegra.c:(.text+0x24): undefined reference to `tegra_pmc_get_suspend_mode' Change the #ifdef check according to the definition. Fixes: 382ac8e22b90 ("cpuidle: tegra: Disable CC6 state if LP2 unavailable") Signed-off-by: Arnd Bergmann Reviewed-by: Dmitry Osipenko Acked-by: Thierry Reding Signed-off-by: Arnd Bergmann

soc/tegra: pmc: Add pins for Tegra194

2020-03-13T09:53:10+00:00

Extend the Tegra194 IO pad table with additional information such as pin names and 1.8/3.3 V settings to allow a table of voltage control pins to generated from it. This is similar to what's done for older chips and is needed to support high-speed modes for SDHCI where switching the pins to 1.8V or 3.3V is necessary. Signed-off-by: Venkat Reddy Talla Signed-off-by: Thierry Reding

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282

2019-06-05T15:36:37+00:00

Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Alexios Zavras Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman