<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/soc/tegra/mc.h, branch v5.18.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2021-06-20T19:22:30+00:00</updated>
<entry>
<title>memory: tegra: Add compile-test stub for tegra_mc_probe_device()</title>
<updated>2021-06-20T19:22:30+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-18T11:18:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=47661ee1821fc3a6b5ae07aac37410d6ccada976'/>
<id>urn:sha1:47661ee1821fc3a6b5ae07aac37410d6ccada976</id>
<content type='text'>
The tegra_mc_probe_device() symbol is only available when the TEGRA_MC
Kconfig option is enabled. Provide a stub if that's not the case so that
the driver can be compile-tested.

Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210618111846.1286166-1-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Implement SID override programming</title>
<updated>2021-06-03T19:50:43+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-03T16:46:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=393d66fd2cacba3e6aa95d7bb38790bfb7b1cc3a'/>
<id>urn:sha1:393d66fd2cacba3e6aa95d7bb38790bfb7b1cc3a</id>
<content type='text'>
Instead of programming all SID overrides during early boot, perform the
operation on-demand after the SMMU translations have been set up for a
device. This reuses data from device tree to match memory clients for a
device and programs the SID specified in device tree, which corresponds
to the SID used for the SMMU context banks for the device.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210603164632.1000458-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Unify drivers</title>
<updated>2021-06-03T19:49:41+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:33:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7355c7b9ae0d45923bac088bc1faebd5e9a66164'/>
<id>urn:sha1:7355c7b9ae0d45923bac088bc1faebd5e9a66164</id>
<content type='text'>
The Tegra210 (and earlier) driver now supports all the functionality
that the Tegra186 (and later) driver does, so they can be unified.

Note that previously the Tegra186 (and later) driver could be unloaded,
even if that was perhaps not very useful. Older chips don't support that
yet, but once they do this code can be reenabled.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-11-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Parameterize interrupt handler</title>
<updated>2021-06-03T19:49:41+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1079a66bc32ff04eaab792152a9ed9c7585b5efc'/>
<id>urn:sha1:1079a66bc32ff04eaab792152a9ed9c7585b5efc</id>
<content type='text'>
Tegra20 requires a slightly different interrupt handler than Tegra30 and
later, so parameterize the handler, so that each SoC implementation can
provide its own.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-8-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Make per-SoC setup more generic</title>
<updated>2021-06-03T19:49:41+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c64738e949940bea2bb426b104b4de0aa42a8f48'/>
<id>urn:sha1:c64738e949940bea2bb426b104b4de0aa42a8f48</id>
<content type='text'>
The current per-SoC setup code runs at a fairly arbitrary point during
probe, thereby making it less flexible for other SoC generations. Move
the call around slightly (after only the very basic, common setup that
applies to all SoC generations has been performed), which will allow
it to be used for other implementations.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-6-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Push suspend/resume into SoC drivers</title>
<updated>2021-06-03T19:49:41+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5c9016f0a8a3ba30c6593d2cb0d067164dd41846'/>
<id>urn:sha1:5c9016f0a8a3ba30c6593d2cb0d067164dd41846</id>
<content type='text'>
Continuing the scheme of unification, push suspend/resume callbacks into
per-SoC driver so that they can be properly parameterized.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-5-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Introduce struct tegra_mc_ops</title>
<updated>2021-06-03T19:49:40+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6cc884c1c7fe5ae9362180d4f7d4091774921a0c'/>
<id>urn:sha1:6cc884c1c7fe5ae9362180d4f7d4091774921a0c</id>
<content type='text'>
Subsequent patches will introduce further callbacks, so create a new
struct tegra_mc_ops to collect all of them in a single place. Move the
existing -&gt;init() callback into the new structure.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-4-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Unify struct tegra_mc across SoC generations</title>
<updated>2021-06-03T19:49:40+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e899993845e60cc24d8e667a312eaa03a05d21ec'/>
<id>urn:sha1:e899993845e60cc24d8e667a312eaa03a05d21ec</id>
<content type='text'>
As another step towards unifying both the Tegra210 (and earlier) and
Tegra186 (and later) memory controller drivers, unify the structures
that are used to represent them.

Note that this comes at a slight space penalty since some fields are
not used on all generations, but the benefits of unifying the driver
outweigh the downsides.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra: Consolidate register fields</title>
<updated>2021-06-03T19:49:40+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2021-06-02T16:32:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4f1ac76e5ed9436ff3cd72e308527fd1e90b193a'/>
<id>urn:sha1:4f1ac76e5ed9436ff3cd72e308527fd1e90b193a</id>
<content type='text'>
Subsequent patches will add more register fields to the tegra_mc_client
structure, so consolidate all register field definitions into a common
sub-structure for coherency.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210602163302.120041-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>memory: tegra20: Add debug statistics</title>
<updated>2021-04-01T17:58:22+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-03-19T13:09:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fbd31f5aa60259bfa836dccb35159a7e17a60314'/>
<id>urn:sha1:fbd31f5aa60259bfa836dccb35159a7e17a60314</id>
<content type='text'>
Add debug statistics collection support. The statistics is available
via debugfs in '/sys/kernel/debug/mc/stats', it shows percent of memory
controller utilization for each memory client. This information is
intended to help with debugging of memory performance issues, it already
was proven to be useful by helping to improve memory bandwidth management
of the display driver.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Link: https://lore.kernel.org/r/20210319130933.23261-1-digetx@gmail.com
</content>
</entry>
</feed>
