<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/soc/tegra/fuse.h, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-02-01T14:58:05+00:00</updated>
<entry>
<title>soc/tegra: fuse: Add support for Tegra241</title>
<updated>2024-02-01T14:58:05+00:00</updated>
<author>
<name>Kartik</name>
<email>kkartik@nvidia.com</email>
</author>
<published>2023-10-17T05:23:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8402074f30238ee1bdc70b843932cd7350830ab6'/>
<id>urn:sha1:8402074f30238ee1bdc70b843932cd7350830ab6</id>
<content type='text'>
Add support for Tegra241 which use ACPI boot.

Signed-off-by: Kartik &lt;kkartik@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add support for Tegra264</title>
<updated>2023-05-16T08:58:50+00:00</updated>
<author>
<name>Stefan Kristiansson</name>
<email>stefank@nvidia.com</email>
</author>
<published>2023-05-11T13:20:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d94436465152465555c8e5efbe611db40c9749f7'/>
<id>urn:sha1:d94436465152465555c8e5efbe611db40c9749f7</id>
<content type='text'>
Add support for Tegra264 to the fuse handling code.

Signed-off-by: Stefan Kristiansson &lt;stefank@nvidia.com&gt;
Signed-off-by: Peter De Schrijver &lt;pdeschrijver@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Use platform info with SoC revision</title>
<updated>2022-11-11T14:00:07+00:00</updated>
<author>
<name>Kartik</name>
<email>kkartik@nvidia.com</email>
</author>
<published>2022-11-09T14:20:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bebf683ba6829f544011411580bcd620b7581087'/>
<id>urn:sha1:bebf683ba6829f544011411580bcd620b7581087</id>
<content type='text'>
Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.

Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.

Signed-off-by: Kartik &lt;kkartik@nvidia.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: Set ERD bit to mask inband errors</title>
<updated>2022-09-15T10:30:11+00:00</updated>
<author>
<name>Sumit Gupta</name>
<email>sumitg@nvidia.com</email>
</author>
<published>2022-05-11T20:16:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=96765cc47546fe6724825600afa8ba170671da61'/>
<id>urn:sha1:96765cc47546fe6724825600afa8ba170671da61</id>
<content type='text'>
Add a function to set the ERD (Error Response Disable) bit in the
MISCREG_CCROC_ERR_CONFIG register from the Control Backbone (CBB) error
handler driver.

ERD bit allows masking of SError due to inband errors which are caused
by illegal register accesses through CBB. When the bit is set, interrupt
is used for reporting errors and magic code '0xdead2003' is returned.
This change is only required for Tegra194 SoC as the config is moved to
CBB register space for future SoC's. Also, remove unmapping the
apbmisc_base as it's required to get the base address for accessing the
misc register.

Signed-off-by: Sumit Gupta &lt;sumitg@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add stubs needed for compile testing</title>
<updated>2021-10-04T19:27:04+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-09-12T20:29:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=45e934407b7efa08cde651d5669d1984a3a4bc69'/>
<id>urn:sha1:45e934407b7efa08cde651d5669d1984a3a4bc69</id>
<content type='text'>
Add stubs needed for compile-testing of tegra-cpuidle driver.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add stubs needed for compile-testing</title>
<updated>2021-06-01T10:15:13+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2021-05-27T23:54:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=30b44e81772a5caa983000057ce1cd9cb4531647'/>
<id>urn:sha1:30b44e81772a5caa983000057ce1cd9cb4531647</id>
<content type='text'>
Add missing stubs that will allow Tegra memory driver to be compile-tested
by kernel build bots.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add stub for tegra_sku_info</title>
<updated>2020-11-06T18:25:21+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2020-11-04T16:48:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=245157a31e91aec7f5b621ed26c0a8370b1c8a64'/>
<id>urn:sha1:245157a31e91aec7f5b621ed26c0a8370b1c8a64</id>
<content type='text'>
Drivers that use tegra_sku_info and have COMPILE_TEST are failing to be
build due to the missing stub for tegra_sku_info.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20201104164923.21238-4-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Add Tegra234 support</title>
<updated>2020-09-18T13:55:29+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-09-17T10:07:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1f44febf71ba3d8a8694669197ec5a384c8d3011'/>
<id>urn:sha1:1f44febf71ba3d8a8694669197ec5a384c8d3011</id>
<content type='text'>
Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.

Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Implement tegra_is_silicon()</title>
<updated>2020-09-18T13:55:26+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-09-17T10:07:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=52e6d399a41da68125ec107f5f5f688a74ab7ac4'/>
<id>urn:sha1:52e6d399a41da68125ec107f5f5f688a74ab7ac4</id>
<content type='text'>
This function can be used by drivers to determine whether code is
running on silicon or on a simulation platform.

Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: fuse: Extract tegra_get_platform()</title>
<updated>2020-09-18T13:55:22+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2020-09-17T10:07:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=775edf7856d81fde852968212cd58fc9a3f8cd7d'/>
<id>urn:sha1:775edf7856d81fde852968212cd58fc9a3f8cd7d</id>
<content type='text'>
This function extracts the PRE_SI_PLATFORM field from the HIDREV
register and can be used to determine which platform the kernel runs on
(silicon, simulation, ...). Note that while only Tegra194 and later
define this field, it should be safe to call this on prior generations
as well since this field should read as 0, indicating silicon.

Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
