kernel/linux.git/include/linux/usb/tegra_usb_phy.h, branch v6.6.131

USB: Follow-up to SPDX identifiers addition - remove now useless comments

2022-06-10T09:24:36+00:00

All these files have been updated in the commit given in the Fixes: tag below. When the SPDX-License-Identifier: has been added, the corresponding text at the beginning of the files has not been deleted. All these texts are about GPL-2.0, with different variation in the wording. Remove these now useless lines to save some LoC. Fixes: 5fd54ace4721 ("USB: add SPDX identifiers to all remaining files in drivers/usb/") Signed-off-by: Christophe JAILLET Signed-off-by: Greg Kroah-Hartman

usb: phy: tegra: Support OTG mode programming

2021-10-05T10:47:49+00:00

Support programming USB PHY into OTG mode. Signed-off-by: Dmitry Osipenko Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20210912181718.1328-5-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

usb: phy: tegra: Support waking up from a low power mode

2021-01-13T10:26:34+00:00

Support programming of waking up from a low power mode by implementing the generic set_wakeup() callback of the USB PHY API. Tested-by: Matt Merhar Tested-by: Nicolas Chauvet Tested-by: Peter Geis Tested-by: Ion Agorria Acked-by: Thierry Reding Acked-by: Peter Chen Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20201218120246.7759-3-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

usb: phy: tegra: Use device-tree notion of reset-GPIO's active-state

2020-01-09T15:21:58+00:00

It is much more intuitive if reset is treated as asserted when GPIO value is set to 1. All NVIDIA Tegra device-trees are properly specifying active state of the reset-GPIO since 2013, let's clean up that part of the code. Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20200106013416.9604-14-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

usb: phy: tegra: Keep track of power on-off state

2020-01-09T10:15:31+00:00

The PHY driver should keep track of the enable state, otherwise enable refcount is screwed if USB driver tries to enable PHY when it is already enabled. This will be the case for ChipIdea and Tegra EHCI drivers once PHY driver will gain support for the init/shutdown callbacks. Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20200106013416.9604-5-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

usb: tegra: Move utmi-pads reset from ehci-tegra to tegra-phy

2018-04-23T07:50:57+00:00

UTMI pads are shared by USB controllers and reset of UTMI pads is shared with the reset of USB1 controller. Currently reset of UTMI pads is done by the EHCI driver and ChipIdea UDC works because EHCI driver always happen to be probed first. Move reset controls from ehci-tegra to tegra-phy in order to resolve the problem. Signed-off-by: Dmitry Osipenko Signed-off-by: Greg Kroah-Hartman

USB: add SPDX identifiers to all remaining files in drivers/usb/

2017-11-04T10:48:02+00:00

It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Update the drivers/usb/ and include/linux/usb* files with the correct SPDX license identifier based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Thomas Gleixner Cc: Kate Stewart Cc: Philippe Ombredanne Signed-off-by: Greg Kroah-Hartman Acked-by: Felipe Balbi Acked-by: Johan Hovold Signed-off-by: Greg Kroah-Hartman

usb: phy: tegra: Program new PHY parameters

2013-08-12T18:29:52+00:00

The Tegra30 TRM recommends configuration of certain PHY parameters for optimal quality. Program the following registers based on device tree parameters: - UTMIP_XCVR_HSSLEW: HS slew rate control. - UTMIP_HSSQUELCH_LEVEL: HS squelch detector level - UTMIP_HSDISCON_LEVEL: HS disconnect detector level. These registers exist in Tegra20, but programming them hasn't been necessary, so these parameters won't be set on Tegra20 to keep the device trees backward compatible. Additionally, the UTMIP_XCVR_SETUP parameter can be set from fuses instead of a software-programmed value, as the optimal value can vary between invidual boards. The boolean property nvidia,xcvr-setup-use-fuses can be used to enable this behaviour. Signed-off-by: Tuomas Tynkkynen Tested-by: Stephen Warren Reviewed-by: Stephen Warren Signed-off-by: Felipe Balbi

usb: phy: tegra: Tegra30 support

2013-08-12T18:29:48+00:00

The Tegra30 USB PHY is a bit different than the Tegra20 PHY: - The EHCI controller supports the HOSTPC register extension, and some of the fields that the PHY needs to modify (PHCD and PTS) have moved to the new HOSTPC register. - Some of the UTMI PLL configuration registers have moved from the USB register space to the Clock-And-Reset controller space. In Tegra30 the clock driver is responsible for configuring the UTMI PLL. - The USBMODE register must be explicitly written to enter host mode. - Certain PHY parameters need to be programmed for optimal signal quality. Support for this will be added in the next patch. The new tegra_phy_soc_config structure is added to describe the differences between the SoCs. Signed-off-by: Tuomas Tynkkynen Tested-by: Stephen Warren Reviewed-by: Stephen Warren Signed-off-by: Felipe Balbi

usb: phy: tegra: Use DT helpers for dr_mode

2013-07-29T10:58:27+00:00

Use the new of_usb_get_dr_mode helper function for parsing dr_mode from the device tree. Also replace the usage of the custom tegra_usb_phy_mode enum with the standard enum. Signed-off-by: Tuomas Tynkkynen Reviewed-by: Stephen Warren Tested-by: Stephen Warren Signed-off-by: Felipe Balbi