kernel/linux.git/include/linux/spi, branch v6.18.21

spi: use generic driver_override infrastructure

2026-04-02T11:23:14+00:00

[ Upstream commit cc34d77dd48708d810c12bfd6f5bf03304f6c824 ] When a driver is probed through __driver_attach(), the bus' match() callback is called without the device lock held, thus accessing the driver_override field without a lock, which can cause a UAF. Fix this by using the driver-core driver_override infrastructure taking care of proper locking internally. Note that calling match() from __driver_attach() without the device lock held is intentional. [1] Also note that we do not enable the driver_override feature of struct bus_type, as SPI - in contrast to most other buses - passes "" to sysfs_emit() when the driver_override pointer is NULL. Thus, printing "\n" instead of "(null)\n". Link: https://lore.kernel.org/driver-core/DGRGTIRHA62X.3RY09D9SOK77P@kernel.org/ [1] Reported-by: Gui-Dong Han Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220789 Fixes: 5039563e7c25 ("spi: Add driver_override SPI device attribute") Signed-off-by: Danilo Krummrich Link: https://patch.msgid.link/20260324005919.2408620-12-dakr@kernel.org Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

spi: rename SPI_CS_CNT_MAX => SPI_DEVICE_CS_CNT_MAX

2025-09-22T08:29:45+00:00

Rename SPI_CS_CNT_MAX to SPI_DEVICE_CS_CNT_MAX to make it more obvious that this is the max number of CS per device supported, not per controller. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-8-jonas.gorski@gmail.com Signed-off-by: Mark Brown

spi: reduce device chip select limit again

2025-09-22T08:29:44+00:00

The spi chipselect limit SPI_CS_CNT_MAX was raised with commit 2f8c7c3715f2 ("spi: Raise limit on number of chip selects") from 4 to 16 to accommodate spi controllers with more than 4 chip selects, and then later to 24 with commit 96893cdd4760 ("spi: Raise limit on number of chip selects to 24"). Now that we removed SPI_CS_CNT_MAX limiting the chip selects of controllers, we can reduce the amount of chip selects per device again to 4, the original value. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-7-jonas.gorski@gmail.com Signed-off-by: Mark Brown

spi: keep track of number of chipselects in spi_device

2025-09-22T08:29:41+00:00

There are several places where we need to iterate over a device's chipselect. To be able to do it efficiently, store the number of chipselects in spi_device, like we do for controllers. Since we now use a device supplied value, add a check to make sure it isn't more than we can support. Signed-off-by: Jonas Gorski Link: https://patch.msgid.link/20250915183725.219473-3-jonas.gorski@gmail.com Signed-off-by: Mark Brown

Merge tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

2025-07-31T20:43:02+00:00

Pull mtd updates from Miquel Raynal: "MTD changes: - Apart from a binding conversion to yaml, only minor changes/small fixes have been merged. Raw NAND changes: - Minor fixes for various controller drivers like DMA mapping checks, better timing derivations or bitflip statistics. - some Hynix NAND flashes were not supporting read-retries, so don't even try to do it SPI NAND changes: - In order to support high-speed modes, certain chips need extra configuration like adding more dummy cycles. This is now possible, especially on Winbond chips. - Aside from that, Gigadevice gets support for a new chip (GD5F1GM9). SPI NOR changes: - A notable changes is the fix for exiting 4-byte addressing on Infineon SEMPER flashes. These flashes do not support the standard EX4B opcode (E9h), and use a vendor-specific opcode (B8h) instead. - There is also a fix for unlocking flashes that are write-protected at power-on. This was caused by using an uninitialized mtd_info in spi_nor_try_unlock_all()" * tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (26 commits) mtd: spinand: winbond: Add comment about the maximum frequency mtd: spinand: winbond: Enable high-speed modes on w35n0xjw mtd: spinand: winbond: Enable high-speed modes on w25n0xjw mtd: spinand: Add a ->configure_chip() hook mtd: spinand: Add a frequency field to all READ_FROM_CACHE variants mtd: spinand: Fix macro alignment spi: spi-mem: Take into account the actual maximum frequency spi: spi-mem: Use picoseconds for calculating the op durations mtd: rawnand: atmel: set pmecc data setup time mtd: spinand: propagate spinand_wait() errors from spinand_write_page() mtd: rawnand: fsmc: Add missing check after DMA map mtd: rawnand: rockchip: Add missing check after DMA map mtd: rawnand: hynix: don't try read-retry on SLC NANDs mtd: rawnand: atmel: Fix dma_mapping_error() address mtd: nand: brcmnand: fix mtd corrected bits stat mtd: rawnand: renesas: Add missing check after DMA map mtd: spinand: gigadevice: Add support for GD5F1GM9 chips mtd: nand: brcmnand: replace manual string choices with standard helpers mtd: map: Don't use "proxy" headers mtd: spi-nor: Fix spi_nor_try_unlock_all() ...

spi: spi-mem: Take into account the actual maximum frequency

2025-07-30T09:32:05+00:00

In order to pick the best variant, the duration of each typical operation is derived and then compared. These durations are based on the maximum capabilities of the chips, which are commonly the limiting factors. However there are other possible limiting pieces, such as the hardware layout, EMC considerations and in some cases, the SPI controller itself. We need to take this into account to further refine our variant choice, so let's use the actual frequency that will be used for the operation instead of the theoretical maximum. Signed-off-by: Miquel Raynal Reviewed-by: Mark Brown

spi: Raise limit on number of chip selects to 24

2025-06-29T21:10:52+00:00

We have a system which uses 24 SPI chip selects, raise the hard coded limit accordingly. Signed-off-by: Marc Kleine-Budde Link: https://patch.msgid.link/20250629-spi-increase-number-of-cs-v2-1-85a0a09bab32@pengutronix.de Signed-off-by: Mark Brown

Merge tag 'spi-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2025-05-27T22:53:55+00:00

Pull spi updates from Mark Brown: "The bulk of the changes in this release are driver work, as well as new device support we have some important work on performance over several drivers, and big overhauls for maintainability on a couple too. Highlights include: - Big cleanups of the sh-msiof driver from Geert Uytterhoeven, and of the NXP FSPI driver from Haibo Chen - Performance improvements for the AXI SPI engine - Support for writes to memory mapped flashes on Renesas devices - Integrated DMA support for Tegra210 QSPI, used by the Tegra234 - DMA support for Amlogic SPI controllers - Support for AMD HID2, Qualcomm IPQ5018, Renesas RZ/G3E, Rockchip RK3528 and Samsung Exynos Autov920 An update to fix some issues with the Atmel QSPI driver runtime PM pulled in a new API from the PM core, and the Renesas memory mapped write changes pull in some code that's shared in drivers/memory" * tag 'spi-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (90 commits) spi: spi-qpic-snand: return early on error from qcom_spi_io_op() spi: loopback-test: fix up const pointer issue in rx_ranges_cmp() spi: gpio: fix const issue in spi_to_spi_gpio() spi: spi-qpic-snand: remove superfluous parameters of qcom_spi_check_error() dt-bindings: spi: samsung: add exynosautov920-spi compatible spi: spi-qpic-snand: reuse qcom_spi_check_raw_flash_errors() spi: dt-bindings: Add rk3528-spi compatible spi: spi_amd: Update Kconfig dependencies spi: spi_amd: Add HIDDMA basic write support spi: spi_amd: Remove read{q,b} usage on DMA buffer spi: sh-msiof: Move register definitions to spi: sh-msiof: Document frame start sync pulse mode spi: sh-msiof: Double maximum DMA transfer size using two groups spi: sh-msiof: Simplify BRG's Division Ratio spi: sh-msiof: Increase TX FIFO size for R-Car V4H/V4M spi: sh-msiof: Correct RX FIFO size for R-Car Gen3 spi: sh-msiof: Correct RX FIFO size for R-Car Gen2 spi: sh-msiof: Add core support for dual-group transfers spi: sh-msiof: Correct SIMDR2_GRPMASK spi: sh-msiof: SIFCTR bitfield conversion ...

spi: use container_of_cont() for to_spi_device()

2025-05-22T11:03:28+00:00

Some places in the spi core pass in a const pointer to a device and the default container_of() casts that away, which is not a good idea. Preserve the proper const attribute by using container_of_const() for to_spi_device() instead, which is what it was designed for. Note, this removes the NULL check for a device pointer in the call, but no one was ever checking for that return value, and a device pointer should never be NULL overall anyway, so this should be a safe change. Cc: Mark Brown Fixes: d69d80484598 ("driver core: have match() callback in struct bus_type take a const *") Signed-off-by: Greg Kroah-Hartman Link: https://patch.msgid.link/2025052230-fidgeting-stooge-66f5@gregkh Signed-off-by: Mark Brown

spi: sh-msiof: Move register definitions to

2025-05-19T10:55:37+00:00

Move the MSIOF register and register bit definitions from the MSIOF SPI driver to the existing header file , so they can be shared with the MSIOF I2S driver. Signed-off-by: Geert Uytterhoeven Link: https://patch.msgid.link/066d1086973eb309006258484e9fe8138807e565.1747401908.git.geert+renesas@glider.be Signed-off-by: Mark Brown