<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/soc/ti, branch v5.18.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-03-27T21:21:57+00:00</updated>
<entry>
<title>Merge tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration</title>
<updated>2022-03-27T21:21:57+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-03-27T21:21:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=50d602d81f35621042fa0cdae25808662caffda8'/>
<id>urn:sha1:50d602d81f35621042fa0cdae25808662caffda8</id>
<content type='text'>
Pull mailbox updates from Jassi Brar:
 "qcom:
   - add support for MSM8976

  mtk:
   - enable mt8186
   - add ADSP controller driver

  ti:
   - use poll mode during suspend

  tegra:
   - fix tx channel flush

  imx:
   - add i.MX8 SECO MU support
   - prepare for, and add iMX93 support"

* tag 'mailbox-v5.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: add definition for mt8186
  mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend
  mailbox: ti-msgmgr: Refactor message read during interrupt handler
  mailbox: imx: support i.MX93 S401 MU
  mailbox: imx: support dual interrupts
  mailbox: imx: extend irq to an array
  dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
  dt-bindings: mailbox: imx-mu: add i.MX93 MU
  mailbox: imx: add i.MX8 SECO MU support
  mailbox: imx: introduce rxdb callback
  dt-bindings: mailbox: imx-mu: add i.MX8 SECO MU support
  mailbox: imx: enlarge timeout while reading/writing messages to SCFW
  mailbox: imx: fix crash in resume on i.mx8ulp
  mailbox: imx: fix wakeup failure from freeze mode
  mailbox: mediatek: add support for adsp mailbox controller
  dt-bindings: mailbox: mtk,adsp-mbox: add mtk adsp-mbox document
  mailbox: qcom-apcs-ipc: Add compatible for MSM8976 SoC
  dt-bindings: mailbox: Add compatible for the MSM8976
  mailbox: tegra-hsp: Flush whole channel
</content>
</entry>
<entry>
<title>mailbox: ti-msgmgr: Operate mailbox in polled mode during system suspend</title>
<updated>2022-03-13T01:33:30+00:00</updated>
<author>
<name>Dave Gerlach</name>
<email>d-gerlach@ti.com</email>
</author>
<published>2022-02-10T04:16:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=df227dc8a68d81b7fe3416eca16d1f21d0b537f0'/>
<id>urn:sha1:df227dc8a68d81b7fe3416eca16d1f21d0b537f0</id>
<content type='text'>
During the system suspend path we must set all queues to operate in
polled mode as it is possible for any protocol built using this mailbox,
such as TISCI, to require communication during the no irq phase of suspend,
and we cannot rely on interrupts there.

Polled mode is implemented by allowing the mailbox user to define an
RX channel as part of the message that is sent which is what gets polled
for a response. If polled mode is enabled, this will immediately be
polled for a response at the end of the mailbox send_data op before
returning success for the data send or timing out if no response is
received.

Finally, to ensure polled mode is always enabled during system suspend,
iterate through all queues to set RX queues to polled mode during system
suspend and disable polled mode for all in the resume handler.

Signed-off-by: Dave Gerlach &lt;d-gerlach@ti.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: ti_sci: Fix compilation failure when CONFIG_TI_SCI_PROTOCOL is not defined</title>
<updated>2022-02-02T19:12:37+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2021-12-23T16:23:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=043cfff99a18933fda2fb2e163daee73cc07910b'/>
<id>urn:sha1:043cfff99a18933fda2fb2e163daee73cc07910b</id>
<content type='text'>
Remove an extra ";" which breaks compilation.

Fixes: 53bf2b0e4e4c ("firmware: ti_sci: Add support for getting resource with subtype")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/e6c3cb793e1a6a2a0ae2528d5a5650dfe6a4b6ff.1640276505.git.christophe.jaillet@wanadoo.fr
</content>
</entry>
<entry>
<title>soc: ti: ti_sci_inta_msi: Remove ti_sci_inta_msi_domain_free_irqs()</title>
<updated>2021-12-16T21:22:19+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-06T22:51:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7ad321a5eadb52b4af1c577dda51783e08235ea7'/>
<id>urn:sha1:7ad321a5eadb52b4af1c577dda51783e08235ea7</id>
<content type='text'>
The function has no users and is pointless now that the core frees the MSI
descriptors, which means potential users can just use msi_domain_free_irqs().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211206210748.793119155@linutronix.de

</content>
</entry>
<entry>
<title>soc: ti: ti_sci_inta_msi: Get rid of ti_sci_inta_msi_get_virq()</title>
<updated>2021-12-16T21:16:41+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2021-12-10T22:19:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=89e0032ec201f76c86d6e3e6f94574dfb8e39b71'/>
<id>urn:sha1:89e0032ec201f76c86d6e3e6f94574dfb8e39b71</id>
<content type='text'>
Just use the core function msi_get_virq().

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Nishanth Menon &lt;nm@ti.com&gt;
Reviewed-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20211210221815.269468319@linutronix.de

</content>
</entry>
<entry>
<title>soc: ti: k3-ringacc: add AM64 DMA rings support.</title>
<updated>2020-12-11T15:50:09+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2020-12-08T09:04:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d782298c6f6b854452965b56d91616dfb60490c5'/>
<id>urn:sha1:d782298c6f6b854452965b56d91616dfb60490c5</id>
<content type='text'>
The DMAs in AM64 have built in rings compared to AM654/J721e/J7200 where a
separate and generic ringacc is used.

The ring SW interface is similar to ringacc with some major architectural
differences, like

They are part of the DMA (BCDMA or PKTDMA).

They are dual mode rings are modeled as pair of Rings objects which has
common configuration and memory buffer, but separate real-time control
register sets for each direction mem2dev (forward) and dev2mem (reverse).

The ringacc driver must be initialized for DMA rings use with
k3_ringacc_dmarings_init() as it is not an independent device as ringacc
is.

AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Link: https://lore.kernel.org/r/20201208090440.31792-17-peter.ujfalusi@ti.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: ti: k3-ringacc: Use correct device for allocation in RING mode</title>
<updated>2020-11-02T03:38:05+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2020-10-25T19:10:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8c42379e40e2db4199ceeb6a6ef9fff73ff132cf'/>
<id>urn:sha1:8c42379e40e2db4199ceeb6a6ef9fff73ff132cf</id>
<content type='text'>
In RING mode the ringacc does not access the ring memory. In this access
mode the ringacc coherency does not have meaning.

If the ring is configured in RING mode, then the ringacc itself will not
access to the ring memory. Only the requester (user) of the ring is going
to read/write to the memory.
Extend the ring configuration parameters with a device pointer to be used
for DMA API when the ring is configured in RING mode.

Extending the ring configuration struct will allow per ring selection of
device to be used for allocation, thus allowing per ring coherency.

To avoid regression, fall back to use the ringacc dev in case the alloc_dev
is not provided.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
</content>
</entry>
<entry>
<title>firmware: ti_sci: rm: Remove unused config() from ti_sci_rm_ringacc_ops</title>
<updated>2020-11-02T03:38:04+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2020-10-25T19:10:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fed7552f1e69296461fca62ebaa0bb5a06fec0df'/>
<id>urn:sha1:fed7552f1e69296461fca62ebaa0bb5a06fec0df</id>
<content type='text'>
The ringacc driver has been converted to use the new set_cfg function to
configure the ring, the old config ops can be removed.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
</content>
</entry>
<entry>
<title>firmware: ti_sci: rm: Add new ops for ring configuration</title>
<updated>2020-11-02T03:38:02+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2020-10-25T19:10:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3c2017536f3a122bf246cc87f9327e9ec138db92'/>
<id>urn:sha1:3c2017536f3a122bf246cc87f9327e9ec138db92</id>
<content type='text'>
The sysfw ring configuration message has been extended to include virtid
and asel value for the ring.
Add the ASEL_VALID to TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER as it is required
for DMA rings.

Instead of extending the current .config() ops - which would need same
patch change in the ringacc driver - add ti_sci_msg_rm_ring_cfg struct and
a new ops using it to configure the ring.

This will allow easy update path in case new members are added for the ring
configuration.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
</content>
</entry>
<entry>
<title>firmware: ti_sci: rm: Remove ring_get_config support</title>
<updated>2020-11-02T03:38:02+00:00</updated>
<author>
<name>Peter Ujfalusi</name>
<email>peter.ujfalusi@ti.com</email>
</author>
<published>2020-10-25T19:10:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4d8ddf673a420aa25668eceeb4fbf33e2521fdf2'/>
<id>urn:sha1:4d8ddf673a420aa25668eceeb4fbf33e2521fdf2</id>
<content type='text'>
The ring_get_cfg (0x1111 message) is not used and it is not supported by
sysfw for a long time.

Signed-off-by: Peter Ujfalusi &lt;peter.ujfalusi@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@oracle.com&gt;
</content>
</entry>
</feed>
