<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/soc/qcom/geni-se.h, branch linux-7.0.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-7.0.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-09-17T18:49:58+00:00</updated>
<entry>
<title>soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem</title>
<updated>2025-09-17T18:49:58+00:00</updated>
<author>
<name>Viken Dadhaniya</name>
<email>viken.dadhaniya@oss.qualcomm.com</email>
</author>
<published>2025-09-11T04:32:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d4bf06592ad68ac4353a81c73e8e662cf88aa2cc'/>
<id>urn:sha1:d4bf06592ad68ac4353a81c73e8e662cf88aa2cc</id>
<content type='text'>
In Qualcomm SoCs, firmware loading for Serial Engines (SE) within the QUP
hardware has traditionally been managed by TrustZone (TZ). This restriction
poses a significant challenge for developers, as it limits their ability to
enable various protocols on any of the SEs from the Linux side, reducing
flexibility.

Load the firmware to QUP SE based on the 'firmware-name' property specified
in devicetree at bootup time.

Co-developed-by: Mukesh Kumar Savaliya &lt;mukesh.savaliya@oss.qualcomm.com&gt;
Signed-off-by: Mukesh Kumar Savaliya &lt;mukesh.savaliya@oss.qualcomm.com&gt;
Signed-off-by: Viken Dadhaniya &lt;viken.dadhaniya@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20250911043256.3523057-4-viken.dadhaniya@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>serial: qcom-geni: fix rx cancel dma status bit</title>
<updated>2024-10-11T06:39:23+00:00</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2024-10-09T14:51:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c657243ae12000dc57e3648b0ddd30da9ffd1f14'/>
<id>urn:sha1:c657243ae12000dc57e3648b0ddd30da9ffd1f14</id>
<content type='text'>
Cancelling an rx command is signalled using bit 14 of the rx DMA status
register and not bit 11.

This bit is currently unused, but this error becomes apparent, for
example, when tracing the status register when closing the port.

Fixes: eddac5af0654 ("soc: qcom: Add GENI based QUP Wrapper driver")
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20241009145110.16847-7-johan+linaro@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: add GP_LENGTH/IRQ_EN_SET/IRQ_EN_CLEAR registers</title>
<updated>2024-09-11T13:44:45+00:00</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2024-09-06T13:13:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b03ffc76b83c1a7d058454efbcf1bf0e345ef1c2'/>
<id>urn:sha1:b03ffc76b83c1a7d058454efbcf1bf0e345ef1c2</id>
<content type='text'>
For UART devices the M_GP_LENGTH is the TX word count. For other
devices this is the transaction word count.

For UART devices the S_GP_LENGTH is the RX word count.

The IRQ_EN set/clear registers allow you to set or clear bits in the
IRQ_EN register without needing a read-modify-write.

Acked-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Link: https://lore.kernel.org/r/20240610152420.v4.1.Ife7ced506aef1be3158712aa3ff34a006b973559@changeid
Tested-by: Nícolas F. R. A. Prado &lt;nfraprado@collabora.com&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20240906131336.23625-4-johan+linaro@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: Add M_TX_FIFO_NOT_EMPTY bit definition</title>
<updated>2024-01-28T03:01:51+00:00</updated>
<author>
<name>Douglas Anderson</name>
<email>dianders@chromium.org</email>
</author>
<published>2024-01-12T23:03:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=486676116f4852d4198690c2c98af060cd96ab83'/>
<id>urn:sha1:486676116f4852d4198690c2c98af060cd96ab83</id>
<content type='text'>
According to the docs I have, bit 21 of the status register is
asserted when the FIFO is _not_ empty. Add the definition.

Signed-off-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/20240112150307.1.I7dc0993c1e758a1efedd651e7e1670deb1b430fb@changeid
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: Add SPI Device mode support for GENI based QuPv3</title>
<updated>2023-07-31T14:57:03+00:00</updated>
<author>
<name>Praveen Talari</name>
<email>quic_ptalari@quicinc.com</email>
</author>
<published>2023-07-14T04:22:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=59bbe86bb212b618ec2b50434f54bb4cfc704f44'/>
<id>urn:sha1:59bbe86bb212b618ec2b50434f54bb4cfc704f44</id>
<content type='text'>
Add device mode supported registers and masks.

Signed-off-by: Praveen Talari &lt;quic_ptalari@quicinc.com&gt;
Reviewed-by: Vijaya Krishna Nivarthi &lt;quic_vnivarth@quicinc.com&gt;
Link: https://lore.kernel.org/r/20230714042203.14251-2-quic_ptalari@quicinc.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: Add interfaces geni_se_tx_init_dma() and geni_se_rx_init_dma()</title>
<updated>2023-06-06T17:38:33+00:00</updated>
<author>
<name>Vijaya Krishna Nivarthi</name>
<email>quic_vnivarth@quicinc.com</email>
</author>
<published>2023-05-17T12:18:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6d6e57594957ee9131bc3802dfc8657ca6f78fee'/>
<id>urn:sha1:6d6e57594957ee9131bc3802dfc8657ca6f78fee</id>
<content type='text'>
The geni_se_xx_dma_prep() interfaces necessarily do DMA mapping before
initiating DMA transfers. This is not suitable for spi where framework
is expected to handle map/unmap.

Expose new interfaces geni_se_xx_init_dma() which do only DMA transfer.

Signed-off-by: Vijaya Krishna Nivarthi &lt;quic_vnivarth@quicinc.com&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Link: https://lore.kernel.org/r/1684325894-30252-2-git-send-email-quic_vnivarth@quicinc.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: Update Tx and Rx fifo depth based on QUP HW version</title>
<updated>2023-03-14T00:15:12+00:00</updated>
<author>
<name>Visweswara Tanuku</name>
<email>quic_vtanuku@quicinc.com</email>
</author>
<published>2023-02-15T05:05:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fe8aa1ba078366ba23fc676efab57183b12a3a81'/>
<id>urn:sha1:fe8aa1ba078366ba23fc676efab57183b12a3a81</id>
<content type='text'>
From QUP HW Version 3.10 and above the Tx and Rx
fifo depth bits are increased to 23:16 bits from
21:16 bits in SE_HW_PARAM registers accomodating
256bytes of fifo depth.

Updated geni_se_get_tx_fifo_depth and
geni_se_get_rx_fifo_depth to retrieve right fifo
depth based on QUP HW version.

Signed-off-by: Visweswara Tanuku &lt;quic_vtanuku@quicinc.com&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230215050528.9507-1-quic_vtanuku@quicinc.com
</content>
</entry>
<entry>
<title>soc: qcom: geni-se: Move qcom-geni-se.h to linux/soc/qcom/geni-se.h</title>
<updated>2023-02-09T12:27:07+00:00</updated>
<author>
<name>Elliot Berman</name>
<email>quic_eberman@quicinc.com</email>
</author>
<published>2023-02-03T21:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=491581f40e4c52c4b36c83e8c75b2210ed7c358a'/>
<id>urn:sha1:491581f40e4c52c4b36c83e8c75b2210ed7c358a</id>
<content type='text'>
Move include/linux/qcom-geni-se.h to include/linux/soc/qcom/geni-se.h.
This removes 1 of a few remaining Qualcomm-specific headers into a more
approciate subdirectory under include/.

Signed-off-by: Elliot Berman &lt;quic_eberman@quicinc.com&gt;
Acked-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Acked-by: Wolfram Sang &lt;wsa@kernel.org&gt; # for I2C
Reviewed-by: Guru Das Srinagesh &lt;quic_gurus@quicinc.com&gt;
Link: https://lore.kernel.org/r/20230203210133.3552796-1-quic_eberman@quicinc.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
