<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/soc/mediatek, branch v5.18.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-03-01T07:21:28+00:00</updated>
<entry>
<title>soc: mediatek: mtk-infracfg: Disable ACP on MT8192</title>
<updated>2022-03-01T07:21:28+00:00</updated>
<author>
<name>Alyssa Rosenzweig</name>
<email>alyssa.rosenzweig@collabora.com</email>
</author>
<published>2022-02-15T18:46:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dcfd5192563909219f6304b4e3e10db071158eef'/>
<id>urn:sha1:dcfd5192563909219f6304b4e3e10db071158eef</id>
<content type='text'>
MT8192 contains an experimental Accelerator Coherency Port
implementation, which does not work correctly but was unintentionally
enabled by default. For correct operation of the GPU, we must set a
chicken bit disabling ACP on MT8192.

Adapted from the following downstream change to the out-of-tree, legacy
Mali GPU driver:

https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5

Note this change is required for both Panfrost and the legacy kernel
driver.

Co-developed-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Signed-off-by: Alyssa Rosenzweig &lt;alyssa.rosenzweig@collabora.com&gt;
Cc: Nick Fan &lt;Nick.Fan@mediatek.com&gt;
Cc: Nicolas Boichat &lt;drinkcat@chromium.org&gt;
Cc: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Tested-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220215184651.12168-1-alyssa.rosenzweig@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add support for mt8186</title>
<updated>2022-02-28T11:02:11+00:00</updated>
<author>
<name>Chun-Jie Chen</name>
<email>chun-jie.chen@mediatek.com</email>
</author>
<published>2022-02-15T10:49:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=88590cbc17033c86c8591d9f22401325961a8a59'/>
<id>urn:sha1:88590cbc17033c86c8591d9f22401325961a8a59</id>
<content type='text'>
Add power domain control data in mt8186.

Signed-off-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Link: https://lore.kernel.org/r/20220215104917.5726-3-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add support for mt8195</title>
<updated>2022-02-28T11:02:04+00:00</updated>
<author>
<name>Chun-Jie Chen</name>
<email>chun-jie.chen@mediatek.com</email>
</author>
<published>2022-01-30T01:21:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=342479c86d3e8f9e946a07ff0cafbd36511ae30a'/>
<id>urn:sha1:342479c86d3e8f9e946a07ff0cafbd36511ae30a</id>
<content type='text'>
Add domain control data including bus protection data size
change due to more protection steps in mt8195.

Signed-off-by: Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;
Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Link: https://lore.kernel.org/r/20220130012104.5292-6-chun-jie.chen@mediatek.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4</title>
<updated>2021-09-13T08:52:12+00:00</updated>
<author>
<name>Yongqiang Niu</name>
<email>yongqiang.niu@mediatek.com</email>
</author>
<published>2021-08-02T08:59:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cb19c107979b8000825060cb5b84dfe9212f4f86'/>
<id>urn:sha1:cb19c107979b8000825060cb5b84dfe9212f4f86</id>
<content type='text'>
This patch add some more ddp component
OVL_2L2 is ovl which include 2 layers overlay
POSTMASK control round corner for display frame
RDMA4 read dma buffer

Signed-off-by: Yongqiang Niu &lt;yongqiang.niu@mediatek.com&gt;
Reviewed-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/1627894773-23872-2-git-send-email-yongqiang.niu@mediatek.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2021-02-21T22:44:44+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-02-21T22:44:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d99676af540c2dc829999928fb81c58c80a1dce4'/>
<id>urn:sha1:d99676af540c2dc829999928fb81c58c80a1dce4</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "A pretty normal tree, lots of refactoring across the board, ttm, i915,
  nouveau, and bunch of features in various drivers.

  docs:
   - lots of updated docs

  core:
   - require crtc to have unique primary plane
   - fourcc macro fix
   - PCI bar quirk for bar resizing
   - don't sent hotplug on error
   - move vm code to legacy
   - nuke hose only used on old oboslete alpha

  dma-buf:
   - kernel doc updates
   - improved lock tracking

  dp/hdmi:
   - DP-HDMI2.1 protocol converter support

  ttm:
   - bo size handling cleanup
   - release a pinned bo warning
   - cleanup lru handler
   - avoid using pages with drm_prime_sg_to_page_addr_arrays

  cma-helper:
   - prime/mmap fixes

  bridge:
   - add DP support

  gma500:
   - remove gma3600 support

  i915:
   - try eDP fast/narrow link again with fallback
   - Intel eDP backlight control
   - replace display register read/write macros
   - refactor intel_display.c
   - display power improvements
   - HPD code cleanup
   - Rocketlake display fixes
   - Power/backlight/RPM fixes
   - DG1 display fix
   - IVB/BYT clear residuals security fix again
   - make i915 mitigations options via parameter
   - HSW GT1 GPU hangs fixes
   - DG1 workaround hang fixes
   - TGL DMAR hang avoidance
   - Lots of GT fixes
   - follow on fixes for residuals clear
   - gen7 per-engine-reset support
   - HDCP2.2 + HDCP1.4 GEN12 DP MST support
   - TGL clear color support
   - backlight refactoring
   - VRR/Adaptive sync enabling on DP/EDP for TGL+
   - async flips for all ilk+

  amdgpu:
   - rework IH ring handling (Vega/Navi)
   - rework HDP handling (Vega/Navi)
   - swSMU updates for renoir/vangogh
   - Sienna Cichild overdrive support
   - FP16 on DCE8-11 support
   - GPU reset on navy flounder/vangogh
   - SMU profile fixes for APU
   - SR-IOV fixes
   - Vangogh SMU fixes
   - fan speed control fixes

  amdkfd:
   - config handling fix
   - buffer free fix
   - recursive lock warnings fix

  nouveau:
   - Turing MMU fault recovery fixes
   - mDP connectors reporting fix
   - audio locking fixes
   - rework engines/instances code to support new scheme

  tegra:
   - VIC newer firmware support
   - display/gr2d fixes for older tegra
   - pm reference leak fix

  mediatek:
   - SOC MT8183 support
   - decouple sub driver + share mtk mutex driver

  radeon:
   - PCI resource fix for some platforms

  ingenic:
   - pm support
   - 8-bit delta RGB panels

  vmwgfx:
   - managed driver helpers

  vc4:
   - BCM2711 DSI1 support
   - converted to atomic helpers
   - enable 10/12 bpc outputs
   - gem prime mmap helpers
   - CEC fix

  omap:
   - use degamma table
   - CTM support
   - rework DSI support

  imx:
   - stack usage fixes
   - drm managed support
   - imx-tve clock provider leak fix
-

  rcar-du:
   - default mode fixes
   - conversion to managed API

  hisilicon:
   - use simple encoder

  vkms:
   - writeback connector support

  d3:
   - BT2020 support"

* tag 'drm-next-2021-02-19' of git://anongit.freedesktop.org/drm/drm: (1459 commits)
  drm/amdgpu: Set reference clock to 100Mhz on Renoir (v2)
  drm/radeon: OLAND boards don't have VCE
  drm/amdkfd: Fix recursive lock warnings
  drm/amd/display: Add FPU wrappers to dcn21_validate_bandwidth()
  drm/amd/display: Fix potential integer overflow
  drm/amdgpu/display: remove hdcp_srm sysfs on device removal
  drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
  drm/i915/gt: Correct surface base address for renderclear
  drm/i915: Disallow plane x+w&gt;stride on ilk+ with X-tiling
  drm/nouveau/top/ga100: initial support
  drm/nouveau/top: add ioctrl/nvjpg
  drm/nouveau/privring: rename from ibus
  drm/nouveau/nvkm: remove nvkm_subdev.index
  drm/nouveau/nvkm: determine subdev id/order from layout
  drm/nouveau/vic: switch to instanced constructor
  drm/nouveau/sw: switch to instanced constructor
  drm/nouveau/sec2: switch to instanced constructor
  drm/nouveau/sec: switch to instanced constructor
  drm/nouveau/pm: switch to instanced constructor
  drm/nouveau/nvenc: switch to instanced constructor
  ...
</content>
</entry>
<entry>
<title>soc / drm: mediatek: Move mtk mutex driver to soc folder</title>
<updated>2021-02-04T14:55:46+00:00</updated>
<author>
<name>CK Hu</name>
<email>ck.hu@mediatek.com</email>
</author>
<published>2020-07-21T07:46:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e1e4f7fea37572f0ccf3887430e52c491e9accb6'/>
<id>urn:sha1:e1e4f7fea37572f0ccf3887430e52c491e9accb6</id>
<content type='text'>
mtk mutex is used by DRM and MDP driver, and its function is SoC-specific,
so move it to soc folder.

Signed-off-by: CK Hu &lt;ck.hu@mediatek.com&gt;
Signed-off-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: cmdq: Remove cmdq_pkt_flush()</title>
<updated>2021-01-31T11:35:46+00:00</updated>
<author>
<name>Chun-Kuang Hu</name>
<email>chunkuang.hu@kernel.org</email>
</author>
<published>2020-12-02T23:58:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1570db1da9f57dfbe5dfa3010233c98947497466'/>
<id>urn:sha1:1570db1da9f57dfbe5dfa3010233c98947497466</id>
<content type='text'>
rx_callback is a standard mailbox callback mechanism and could
cover the function of proprietary cmdq_task_cb, so it is better
to use the standard one instead of the proprietary one. But
register rx_callback should before mbox_request_channel(),
so remove cmdq_pkt_flush() and let client driver implement
its own synchronous flush.

Signed-off-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Link: https://lore.kernel.org/r/20201202235856.7652-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc: mediatek: pm-domains: Add support for mt8167</title>
<updated>2021-01-31T10:19:30+00:00</updated>
<author>
<name>Fabien Parent</name>
<email>fparent@baylibre.com</email>
</author>
<published>2020-12-09T13:32:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=207f13b419a60c56fb75baeb3d668de080514354'/>
<id>urn:sha1:207f13b419a60c56fb75baeb3d668de080514354</id>
<content type='text'>
Add the needed board data to support mt8167 SoC.

Signed-off-by: Fabien Parent &lt;fparent@baylibre.com&gt;
Reviewed-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Link: https://lore.kernel.org/r/20201209133238.384030-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h</title>
<updated>2020-11-27T23:34:23+00:00</updated>
<author>
<name>Yongqiang Niu</name>
<email>yongqiang.niu@mediatek.com</email>
</author>
<published>2020-10-06T19:33:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=51c0e618b219c025ddaaf14baea8942cb7e2105b'/>
<id>urn:sha1:51c0e618b219c025ddaaf14baea8942cb7e2105b</id>
<content type='text'>
MMSYS is the driver which controls the routing of these DDP components,
so the definition of the mtk_ddp_comp_id enum should be placed in mtk-mmsys.h

Signed-off-by: Yongqiang Niu &lt;yongqiang.niu@mediatek.com&gt;
Signed-off-by: Enric Balletbo i Serra &lt;enric.balletbo@collabora.com&gt;
Reviewed-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Link: https://lore.kernel.org/r/20201006193320.405529-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
<entry>
<title>soc / drm: mediatek: cmdq: Remove timeout handler in helper function</title>
<updated>2020-11-27T22:35:34+00:00</updated>
<author>
<name>Chun-Kuang Hu</name>
<email>chunkuang.hu@kernel.org</email>
</author>
<published>2020-11-02T00:04:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a69dcdfc2dd21f86cb1f79f98fc94c52f96cff64'/>
<id>urn:sha1:a69dcdfc2dd21f86cb1f79f98fc94c52f96cff64</id>
<content type='text'>
For each client driver, its timeout handler need to dump hardware register
or its state machine information, and their way to detect timeout are
also different, so remove timeout handler in helper function and
let client driver implement its own timeout handler.

Signed-off-by: Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;
Acked-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Link: https://lore.kernel.org/r/20201102000438.29225-1-chunkuang.hu@kernel.org
Signed-off-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
</content>
</entry>
</feed>
