<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/phy/pcie.h, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-09-04T15:05:48+00:00</updated>
<entry>
<title>phy: rockchip: Support PCIe v3</title>
<updated>2022-09-04T15:05:48+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2022-08-25T19:38:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=2e9bffc4f713db465177238f6033f7d367d6f151'/>
<id>urn:sha1:2e9bffc4f713db465177238f6033f7d367d6f151</id>
<content type='text'>
RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566.
It use a dedicated PCIe-phy. Add support for this.

Initial support by Shawn Lin, modifications by Peter Geis and Frank
Wunderlich.

Add data-lanes property for splitting pcie-lanes across controllers.

The data-lanes is an array where x=0 means lane is disabled and  x &gt; 0
means controller x is assigned to phy lane.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Suggested-by: Peter Geis &lt;pgwipeout@gmail.com&gt;
Signed-off-by: Frank Wunderlich &lt;frank-w@public-files.de&gt;
Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
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