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<title>kernel/linux.git/include/linux/pci-ecam.h, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
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<updated>2025-05-30T17:21:57+00:00</updated>
<entry>
<title>PCI: host-common: Convert to library for host controller drivers</title>
<updated>2025-05-30T17:21:57+00:00</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@linaro.org</email>
</author>
<published>2025-05-08T07:10:32+00:00</published>
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<id>urn:sha1:d1c696dba120624256ab335ab8247f535b872309</id>
<content type='text'>
This common library will be used as a placeholder for helper functions
shared by the host controller drivers. This avoids placing the host
controller drivers specific helpers in drivers/pci/*.c, to avoid enlarging
the kernel image on platforms that do not use host controller drivers at
all (like x86/ACPI platforms).

Suggested-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Signed-off-by: Krzysztof Wilczyński &lt;kwilczynski@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://patch.msgid.link/20250508-pcie-reset-slot-v4-3-7050093e2b50@linaro.org
</content>
</entry>
<entry>
<title>PCI: host-generic: Allow {en,dis}able_device() to be provided via pci_ecam_ops</title>
<updated>2025-01-15T20:52:12+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>maz@kernel.org</email>
</author>
<published>2024-12-04T15:01:44+00:00</published>
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<id>urn:sha1:477ac7b0a7984e12e8db07fe54ad64443c5f8928</id>
<content type='text'>
In order to let host controller drivers using the host-generic
infrastructure use the {en,dis}able_device() callbacks that can be used to
configure sideband RID mapping hardware, provide these two callbacks as
part of the pci_ecam_ops structure.

Link: https://lore.kernel.org/r/20241204150145.800408-2-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
</content>
</entry>
<entry>
<title>PCI: host-generic: Convert to platform remove callback returning void</title>
<updated>2023-11-20T21:53:14+00:00</updated>
<author>
<name>Uwe Kleine-König</name>
<email>u.kleine-koenig@pengutronix.de</email>
</author>
<published>2023-10-20T09:21:07+00:00</published>
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<id>urn:sha1:d9dcdb4531fe39ce48919ef8c2c9369ee49f3ad2</id>
<content type='text'>
The .remove() callback for a platform driver returns an int which makes
many driver authors wrongly assume it's possible to do error handling by
returning an error code.  However the value returned is (mostly) ignored
and this typically results in resource leaks. To improve here there is a
quest to make the remove callback return void. In the first step of this
quest all drivers are converted to .remove_new() which already returns
void.

pci_host_common_remove() returned zero unconditionally. With that converted
to return void instead, the generic pci host driver can be switched to
.remove_new() trivially.

Link: https://lore.kernel.org/r/20231020092107.2148311-1-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: loongson: Add ACPI init support</title>
<updated>2022-07-14T20:25:36+00:00</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2022-07-14T12:42:12+00:00</published>
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<id>urn:sha1:cd89edda4002b7fb3c0a6765c3a60a60d5b1dc16</id>
<content type='text'>
Loongson PCH (LS7A chipset) will be used by both MIPS-based and LoongArch-
based Loongson processors. MIPS-based Loongson uses FDT, while LoongArch-
based Loongson uses ACPI.

Add ACPI init support for the driver in pci-loongson.c because it is
currently FDT-only.

LoongArch is a new RISC ISA, mainline support will come soon, and
documentations are here (in translation):

  https://github.com/loongson/LoongArch-Documentation

Link: https://lore.kernel.org/r/20220714124216.1489304-4-chenhuacai@loongson.cn
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Dynamically map ECAM regions</title>
<updated>2021-06-16T22:20:40+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@armlinux.org.uk</email>
</author>
<published>2021-05-13T14:18:27+00:00</published>
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<id>urn:sha1:8fe55ef23387ce3c7488375b1fd539420d7654bb</id>
<content type='text'>
Attempting to boot 32-bit ARM kernels under QEMU's 3.x virt models fails
when we have more than 512M of RAM in the model as we run out of vmalloc
space for the PCI ECAM regions. This failure will be silent when running
libvirt, as the console in that situation is a PCI device.

In this configuration, the kernel maps the whole ECAM, which QEMU sets up
for 256 buses, even when maybe only seven buses are in use.  Each bus uses
1M of ECAM space, and ioremap() adds an additional guard page between
allocations. The kernel vmap allocator will align these regions to 512K,
resulting in each mapping eating 1.5M of vmalloc space. This means we need
384M of vmalloc space just to map all of these, which is very wasteful of
resources.

Fix this by only mapping the ECAM for buses we are going to be using.  In
my setups, this is around seven buses in most guests, which is 10.5M of
vmalloc space - way smaller than the 384M that would otherwise be required.
This also means that the kernel can boot without forcing extra RAM into
highmem with the vmalloc= argument, or decreasing the virtual RAM available
to the guest.

Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/E1lhCAV-0002yb-50@rmk-PC.armlinux.org.uk
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>PCI: tegra: Add Tegra194 MCFG quirks for ECAM errata</title>
<updated>2021-04-16T16:34:17+00:00</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2021-04-16T13:45:37+00:00</published>
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<id>urn:sha1:7f100744749e4fe547dece3bb6557fae5f0a7252</id>
<content type='text'>
The PCIe controller in Tegra194 SoC is not ECAM-compliant.  With the
current hardware design, ECAM can be enabled only for one controller (the
C5 controller) with bus numbers starting from 160 instead of 0. A different
approach is taken to avoid this abnormal way of enabling ECAM for just one
controller but to enable configuration space access for all the other
controllers. In this approach, ops are added through MCFG quirk mechanism
which access the configuration spaces by dynamically programming iATU
(internal AddressTranslation Unit) to generate respective configuration
accesses just like the way it is done in DesignWare core sub-system.

This issue is specific to Tegra194 and it would be fixed in the future
generations of Tegra SoCs.

Link: https://lore.kernel.org/r/20210416134537.19474-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Unify ECAM constants in native PCI Express drivers</title>
<updated>2020-12-10T20:55:49+00:00</updated>
<author>
<name>Krzysztof Wilczyński</name>
<email>kw@linux.com</email>
</author>
<published>2020-11-29T23:07:39+00:00</published>
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<id>urn:sha1:e7708f5b10e205d6291bb495e645a03553b9768b</id>
<content type='text'>
Add ECAM-related constants to provide a set of standard constants
defining memory address shift values to the byte-level address that can
be used to access the PCI Express Configuration Space, and then move
native PCI Express controller drivers to use the newly introduced
definitions retiring driver-specific ones.

Refactor pci_ecam_map_bus() function to use newly added constants so
that limits to the bus, device function and offset (now limited to 4K as
per the specification) are in place to prevent the defective or
malicious caller from supplying incorrect configuration offset and thus
targeting the wrong device when accessing extended configuration space.

This refactor also allows for the ".bus_shift" initialisers to be
dropped when the user is not using a custom value as a default value
will be used as per the PCI Express Specification.

Thanks to Qian Cai &lt;qcai@redhat.com&gt;, Michael Walle &lt;michael@walle.cc&gt;,
and Vladimir Oltean &lt;olteanv@gmail.com&gt; for reporting a pci_ecam_create()
issue with .bus_shift and to Vladimir for proposing the fix.

[bhelgaas: incorporate Vladimir's fix, update commit log]
Suggested-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Link: https://lore.kernel.org/r/20201129230743.3006978-2-kw@linux.com
Tested-by: Michael Walle &lt;michael@walle.cc&gt;
Signed-off-by: Krzysztof Wilczyński &lt;kw@linux.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Jon Derrick &lt;jonathan.derrick@intel.com&gt;
Reviewed-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ACPI: Add Ampere Altra SOC MCFG quirk</title>
<updated>2020-09-17T17:27:43+00:00</updated>
<author>
<name>Tuan Phan</name>
<email>tuanphan@os.amperecomputing.com</email>
</author>
<published>2020-08-06T21:57:34+00:00</published>
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<id>urn:sha1:877c1a5f79c6984bbe3f2924234c08e2f4f1acd5</id>
<content type='text'>
Ampere Altra SOC supports only 32-bit ECAM reads.  Add an MCFG quirk for
the platform.

Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com
Signed-off-by: Tuan Phan &lt;tuanphan@os.amperecomputing.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: host-generic: Eliminate pci_host_common_probe wrappers</title>
<updated>2020-05-07T08:29:43+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-04-09T23:49:23+00:00</published>
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<id>urn:sha1:b2f75a41eaa6bfc4aa6f6a1faefbf21c2c8d1588</id>
<content type='text'>
Most ECAM host drivers are just different pci_ecam_ops which can be DT
match table data. That's already the case in some cases, but let's
do that for all the ECAM drivers. Then we can use
of_device_get_match_data() in pci_host_common_probe() and eliminate the
probe wrapper functions and use pci_host_common_probe() directly for
probe.

Link: https://lore.kernel.org/r/20200409234923.21598-4-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Zhou Wang &lt;wangzhou1@hisilicon.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Robert Richter &lt;rrichter@marvell.com&gt;
Cc: Marc Gonzalez &lt;marc.w.gonzalez@free.fr&gt;
Cc: Mans Rullgard &lt;mans@mansr.com&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</content>
</entry>
<entry>
<title>PCI: host-generic: Support building as modules</title>
<updated>2020-05-01T15:29:27+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2020-04-09T23:49:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0c59c06a7c90390c3985c9acd58a73320781c15e'/>
<id>urn:sha1:0c59c06a7c90390c3985c9acd58a73320781c15e</id>
<content type='text'>
Enable building host-generic and its host-common dependency as a
module.

Link: https://lore.kernel.org/r/20200409234923.21598-3-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: Andrew Murray &lt;amurray@thegoodpenguin.co.uk&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: linux-pci@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
</content>
</entry>
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