<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/nvme.h, branch v5.10.258</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.258</id>
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<updated>2026-02-06T15:40:12+00:00</updated>
<entry>
<title>nvme-pci: do not directly handle subsys reset fallout</title>
<updated>2026-02-06T15:40:12+00:00</updated>
<author>
<name>Keith Busch</name>
<email>kbusch@kernel.org</email>
</author>
<published>2026-01-21T03:06:18+00:00</published>
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<id>urn:sha1:5905a6f0acb533cadeebe849aebee36f1ac2918d</id>
<content type='text'>
[ Upstream commit 210b1f6576e8b367907e7ff51ef425062e1468e4 ]

Scheduling reset_work after a nvme subsystem reset is expected to fail
on pcie, but this also prevents potential handling the platform's pcie
services may provide that might successfully recovering the link without
re-enumeration. Such examples include AER, DPC, and power's EEH.

Provide a pci specific operation that safely initiates a subsystem
reset, and instead of scheduling reset work, read back the status
register to trigger a pcie read error.

Since this only affects pci, the other fabrics drivers subscribe to a
generic nvmf subsystem reset that is exactly the same as before. The
loop fabric doesn't use it because nvmet doesn't support setting that
property anyway.

And since we're using the magic NSSR value in two places now, provide a
symbolic define for it.

Reported-by: Nilay Shroff &lt;nilay@linux.ibm.com&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Keith Busch &lt;kbusch@kernel.org&gt;
Stable-dep-of: 0edb475ac0a7 ("nvme: fix PCIe subsystem reset controller state transition")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nvme: fixup comment for nvme RDMA Provider Type</title>
<updated>2024-07-05T07:12:50+00:00</updated>
<author>
<name>Hannes Reinecke</name>
<email>hare@suse.de</email>
</author>
<published>2024-06-17T07:27:27+00:00</published>
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<id>urn:sha1:cb4e7a8f3965e200447ac2c59211f07464b64be1</id>
<content type='text'>
[ Upstream commit f80a55fa90fa76d01e3fffaa5d0413e522ab9a00 ]

PRTYPE is the provider type, not the QP service type.

Fixes: eb793e2c9286 ("nvme.h: add NVMe over Fabrics definitions")
Signed-off-by: Hannes Reinecke &lt;hare@kernel.org&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Keith Busch &lt;kbusch@kernel.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>nvme: handle the persistent internal error AER</title>
<updated>2023-05-17T09:47:51+00:00</updated>
<author>
<name>Michael Kelley</name>
<email>mikelley@microsoft.com</email>
</author>
<published>2022-06-08T18:52:21+00:00</published>
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<id>urn:sha1:a9e3d9bac9633e8ce038b6ed05ab8ebc5ddfbe55</id>
<content type='text'>
[ Upstream commit 2c61c97fb12b806e1c8eb15f04c277ad097ec95e ]

In the NVM Express Revision 1.4 spec, Figure 145 describes possible
values for an AER with event type "Error" (value 000b). For a
Persistent Internal Error (value 03h), the host should perform a
controller reset.

Add support for this error using code that already exists for
doing a controller reset. As part of this support, introduce
two utility functions for parsing the AER type and subtype.

This new support was tested in a lab environment where we can
generate the persistent internal error on demand, and observe
both the Linux side and NVMe controller side to see that the
controller reset has been done.

Signed-off-by: Michael Kelley &lt;mikelley@microsoft.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jens Axboe &lt;axboe@kernel.dk&gt;
Stable-dep-of: 6622b76fe922 ("nvme: fix async event trace event")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>nvme: fix the NVME_CMD_EFFECTS_CSE_MASK definition</title>
<updated>2023-01-14T09:16:25+00:00</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2022-12-21T09:30:45+00:00</published>
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<id>urn:sha1:4b3282a9779c079c4fa5a911ccae4cf7c30a580f</id>
<content type='text'>
[ Upstream commit 685e6311637e46f3212439ce2789f8a300e5050f ]

3 &lt;&lt; 16 does not generate the correct mask for bits 16, 17 and 18.
Use the GENMASK macro to generate the correct mask instead.

Fixes: 84fef62d135b ("nvme: check admin passthru command effects")
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Keith Busch &lt;kbusch@kernel.org&gt;
Reviewed-by: Sagi Grimberg &lt;sagi@grimberg.me&gt;
Reviewed-by: Kanchan Joshi &lt;joshi.k@samsung.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>nvme-pci: allow use of cmb on v1.4 controllers</title>
<updated>2021-02-07T14:37:16+00:00</updated>
<author>
<name>Klaus Jensen</name>
<email>k.jensen@samsung.com</email>
</author>
<published>2021-01-15T06:30:46+00:00</published>
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<id>urn:sha1:3e554aa3d08a1d319b60c8e8db31dcdd97f3b945</id>
<content type='text'>
[ Upstream commit 20d3bb92e84d417b0494a3b6867f0c86713db257 ]

Since NVMe v1.4 the Controller Memory Buffer must be explicitly enabled
by the host.

Signed-off-by: Klaus Jensen &lt;k.jensen@samsung.com&gt;
[hch: avoid a local variable and add a comment]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>nvmet: add passthru code to process commands</title>
<updated>2020-07-29T05:45:21+00:00</updated>
<author>
<name>Logan Gunthorpe</name>
<email>logang@deltatee.com</email>
</author>
<published>2020-07-24T17:25:17+00:00</published>
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<id>urn:sha1:c1fef73f793b7fd9d2ffcb5ef85807ea55bf7adb</id>
<content type='text'>
Add passthru command handling capability for the NVMeOF target and
export passthru APIs which are used to integrate passthru
code with nvmet-core.

The new file passthru.c handles passthru cmd parsing and execution.
In the passthru mode, we create a block layer request from the nvmet
request and map the data on to the block layer request.

Admin commands and features are on an allow list as there are a number
of each that don't make too much sense with passthrough. We use an
allow list such that new commands can be considered before being blindly
passed through. In both cases, vendor specific commands are always
allowed.

We also reject reservation IO commands as the underlying device cannot
differentiate between multiple hosts behind a fabric.

Based-on-a-patch-by: Chaitanya Kulkarni &lt;chaitanya.kulkarni@wdc.com&gt;
Signed-off-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;
Reviewed-by: Keith Busch &lt;kbusch@kernel.org&gt;
Reviewed-by: Sagi Grimberg &lt;sagi@grimberg.me&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>nvme: support for zoned namespaces</title>
<updated>2020-07-08T14:16:20+00:00</updated>
<author>
<name>Keith Busch</name>
<email>keith.busch@wdc.com</email>
</author>
<published>2020-06-29T19:06:41+00:00</published>
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<id>urn:sha1:240e6ee272c07a2636dfc7d65f5bbb18377c49e5</id>
<content type='text'>
Add support for NVM Express Zoned Namespaces (ZNS) Command Set defined
in NVM Express TP4053. Zoned namespaces are discovered based on their
Command Set Identifier reported in the namespaces Namespace
Identification Descriptor list. A successfully discovered Zoned
Namespace will be registered with the block layer as a host managed
zoned block device with Zone Append command support. A namespace that
does not support append is not supported by the driver.

Reviewed-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;
Reviewed-by: Johannes Thumshirn &lt;johannes.thumshirn@wdc.com&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.de&gt;
Reviewed-by: Sagi Grimberg &lt;sagi@grimberg.me&gt;
Reviewed-by: Javier González &lt;javier.gonz@samsung.com&gt;
Reviewed-by: Himanshu Madhani &lt;himanshu.madhani@oracle.com&gt;
Signed-off-by: Hans Holmberg &lt;hans.holmberg@wdc.com&gt;
Signed-off-by: Dmitry Fomichev &lt;dmitry.fomichev@wdc.com&gt;
Signed-off-by: Ajay Joshi &lt;ajay.joshi@wdc.com&gt;
Signed-off-by: Aravind Ramesh &lt;aravind.ramesh@wdc.com&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@wdc.com&gt;
Signed-off-by: Matias Bjørling &lt;matias.bjorling@wdc.com&gt;
Signed-off-by: Damien Le Moal &lt;damien.lemoal@wdc.com&gt;
Signed-off-by: Keith Busch &lt;keith.busch@wdc.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>nvme: support for multiple Command Sets Supported and Effects log pages</title>
<updated>2020-07-08T14:16:20+00:00</updated>
<author>
<name>Keith Busch</name>
<email>keith.busch@wdc.com</email>
</author>
<published>2020-06-29T19:06:40+00:00</published>
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<id>urn:sha1:be93e87e780253780df9bb6ecc9bc1199b0d94c3</id>
<content type='text'>
The Commands Supported and Effects log page was extended with a CSI
field that enables the host to query the log page for each command set
supported. Retrieve this log page for each command set that an attached
namespace supports, and save a pointer to that log in the namespace head.

Reviewed-by: Matias Bjørling &lt;matias.bjorling@wdc.com&gt;
Reviewed-by: Javier González &lt;javier.gonz@samsung.com&gt;
Reviewed-by: Himanshu Madhani &lt;himanshu.madhani@oracle.com&gt;
Reviewed-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.de&gt;
Reviewed-by: Johannes Thumshirn &lt;johannes.thumshirn@wdc.com&gt;
Reviewed-by: Daniel Wagner &lt;dwagner@suse.de&gt;
Signed-off-by: Keith Busch &lt;keith.busch@wdc.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>nvme: implement multiple I/O Command Set support</title>
<updated>2020-07-08T14:16:19+00:00</updated>
<author>
<name>Niklas Cassel</name>
<email>niklas.cassel@wdc.com</email>
</author>
<published>2020-06-29T19:06:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=71010c30945425203da8d069a10fa45a05a00f96'/>
<id>urn:sha1:71010c30945425203da8d069a10fa45a05a00f96</id>
<content type='text'>
Implements support for multiple I/O Command Sets.  NVMe TP 4056
introduces a method to enumerate multiple command sets per namespace. If
the command set is exposed, this method for enumeration will be used
instead of the traditional method that uses the CC.CSS register command
set register for command set identification.

For namespaces where the Command Set Identifier is not supported or
recognized, the specific namespace will not be created.

Reviewed-by: Javier González &lt;javier.gonz@samsung.com&gt;
Reviewed-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;
Reviewed-by: Johannes Thumshirn &lt;johannes.thumshirn@wdc.com&gt;
Reviewed-by: Matias Bjørling &lt;matias.bjorling@wdc.com&gt;
Reviewed-by: Daniel Wagner &lt;dwagner@suse.de&gt;
Reviewed-by: Himanshu Madhani &lt;himanshu.madhani@oracle.com&gt;
Reviewed-by: Hannes Reinecke &lt;hare@suse.de&gt;
Signed-off-by: Niklas Cassel &lt;niklas.cassel@wdc.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>nvme: add Metadata Capabilities enumerations</title>
<updated>2020-05-27T05:12:40+00:00</updated>
<author>
<name>Israel Rukshin</name>
<email>israelr@mellanox.com</email>
</author>
<published>2020-05-19T14:06:00+00:00</published>
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<id>urn:sha1:39481fbd14ee272edd419d73a98bc637e2a3fd35</id>
<content type='text'>
The enumerations will be used to expose the namespace metadata format by
the target.

Suggested-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Israel Rukshin &lt;israelr@mellanox.com&gt;
Signed-off-by: Max Gurtovoy &lt;maxg@mellanox.com&gt;
Reviewed-by: James Smart &lt;james.smart@broadcom.com&gt;
Reviewed-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
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