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<title>kernel/linux.git/include/linux/mtd/onfi.h, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
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<updated>2023-10-16T08:47:22+00:00</updated>
<entry>
<title>mtd: rawnand: Ensure the nand chip supports cached reads</title>
<updated>2023-10-16T08:47:22+00:00</updated>
<author>
<name>Rouven Czerwinski</name>
<email>r.czerwinski@pengutronix.de</email>
</author>
<published>2023-09-22T14:17:16+00:00</published>
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<id>urn:sha1:f6ca3fb6978f94d95ee79f95085fc22e71ca17cc</id>
<content type='text'>
Both the JEDEC and ONFI specification say that read cache sequential
support is an optional command. This means that we not only need to
check whether the individual controller supports the command, we also
need to check the parameter pages for both ONFI and JEDEC NAND flashes
before enabling sequential cache reads.

This fixes support for NAND flashes which don't support enabling cache
reads, i.e. Samsung K9F4G08U0F or Toshiba TC58NVG0S3HTA00.

Sequential cache reads are now only available for ONFI and JEDEC
devices, if individual vendors implement this, it needs to be enabled
per vendor.

Tested on i.MX6Q with a Samsung NAND flash chip that doesn't support
sequential reads.

Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads")
Cc: stable@vger.kernel.org
Signed-off-by: Rouven Czerwinski &lt;r.czerwinski@pengutronix.de&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20230922141717.35977-1-r.czerwinski@pengutronix.de
</content>
</entry>
<entry>
<title>mtd: rawnand: Support enabling NV-DDR through SET_FEATURES</title>
<updated>2021-05-26T08:51:00+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:44+00:00</published>
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<id>urn:sha1:f3fe156ede6db96a060cc98ff1bce1ee6417a68b</id>
<content type='text'>
Until now the parameter of the ADDR_TIMING_MODE feature was just the
ONFI timing mode (from 0 to 5) because we were only supporting the SDR
data interface. In the same byte, bits 4 and 5 indicate which data
interface is being configured so use them to set the right mode and also
read them back to ensure the right timing has been setup on the chip's
side.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-17-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Add onfi_fill_nvddr_interface_config() helper</title>
<updated>2021-05-26T08:43:50+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:39+00:00</published>
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<id>urn:sha1:45606518f961b9e7adddc017e7813fa9f92b43fb</id>
<content type='text'>
Same logic as for the SDR path, let's create a
onfi_fill_nvddr_interface_config() helper to fill an interface
configuration structure with NV-DDR timings, given a specific ONFI mode.

There is one additional thing to do compared to SDR mode: tCAD timing
can be fast or slow and this depends on an ONFI parameter page bit. By
default the slow value is declared in the timings structure definition,
but this helper can shrink it down if necessary.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-12-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page</title>
<updated>2021-05-26T08:43:46+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9310668fb60a7ee76c4fdfd6388747a6f2beaf75'/>
<id>urn:sha1:9310668fb60a7ee76c4fdfd6388747a6f2beaf75</id>
<content type='text'>
When parsing the ONFI parameter page, save the available NV-DDR timing
modes in the core's dynamic ONFI structure. Once available to the rest
of the core out of the ONFI driver, these values will then be used to
derive the best timing mode.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-10-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Clarify the NV-DDR entries in the ONFI structure</title>
<updated>2021-05-26T08:43:42+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=7ce872d9f55f46ef54b60ed39c0144b24578d7c3'/>
<id>urn:sha1:7ce872d9f55f46ef54b60ed39c0144b24578d7c3</id>
<content type='text'>
Both src_sync_timing_mode and src_ssync_features entries of the ONFI
parameter page have been updated and now are named nvddr_timing_modes,
nvddr2_timing_modes and nvddr_nvddr2_features, which is much more
understandable for someone which do not know the history of the ONFI
specification. Update the relevant structure with regard to these
changes.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-8-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Use more recent ONFI specification wording</title>
<updated>2021-05-26T08:43:40+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:34+00:00</published>
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<id>urn:sha1:dbb7b2e07564443c2d357398e83e27c2fa5a89ed</id>
<content type='text'>
In particular, first ONFI specifications referred to SDR modes as
asynchronous modes, which is not the term we usually have in mind. The
spec has then been updated, so do the same here in the NAND subsystem to
avoid any possible confusion.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-7-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: onfi: Use the BIT() macro when possible</title>
<updated>2021-05-26T08:43:37+00:00</updated>
<author>
<name>Miquel Raynal</name>
<email>miquel.raynal@bootlin.com</email>
</author>
<published>2021-05-05T21:37:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=64de50e38e6fced70d1cb9ad3112de0691d0ed2d'/>
<id>urn:sha1:64de50e38e6fced70d1cb9ad3112de0691d0ed2d</id>
<content type='text'>
Update the onfi.h header to use the BIT() macro.

Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
Acked-by: Alexander Dahl &lt;ada@thorsis.com&gt;
Link: https://lore.kernel.org/linux-mtd/20210505213750.257417-5-miquel.raynal@bootlin.com
</content>
</entry>
<entry>
<title>mtd: rawnand: Move ONFI code to nand_onfi.c</title>
<updated>2018-10-03T09:12:25+00:00</updated>
<author>
<name>Boris Brezillon</name>
<email>boris.brezillon@bootlin.com</email>
</author>
<published>2018-09-06T22:38:50+00:00</published>
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<id>urn:sha1:1c325cc5077a88510afc08b1d2c75bcf18681f21</id>
<content type='text'>
This moves ONFI related code to nand_onfi.c and ONFI related
struct/macros to include/linux/mtd/onfi.h.

Signed-off-by: Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;
Signed-off-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;
</content>
</entry>
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