<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/mmc/sdhci.h, branch v3.18.136</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v3.18.136</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v3.18.136'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2014-10-03T12:18:17+00:00</updated>
<entry>
<title>mmc: sdhci: Add quirk for always getting TC with stop cmd</title>
<updated>2014-10-03T12:18:17+00:00</updated>
<author>
<name>Adrian Hunter</name>
<email>adrian.hunter@intel.com</email>
</author>
<published>2014-09-24T07:27:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=615413979487a1e25a3b76abbaa316280ca19d26'/>
<id>urn:sha1:615413979487a1e25a3b76abbaa316280ca19d26</id>
<content type='text'>
Add a quirk for a host controller that always sets
a Transfer Complete interrupt status for the stop
command even when a busy response is not indicated.

Signed-off-by: Adrian Hunter &lt;adrian.hunter@intel.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: handle busy-end interrupt during command</title>
<updated>2014-09-09T11:59:23+00:00</updated>
<author>
<name>Chanho Min</name>
<email>chanho.min@lge.com</email>
</author>
<published>2014-08-30T03:40:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e99783a45220a2c5f5a598e0e81213ecf2dbcf2f'/>
<id>urn:sha1:e99783a45220a2c5f5a598e0e81213ecf2dbcf2f</id>
<content type='text'>
It is fully legal for a controller to start handling busy-end interrupt
before it has signaled that the command has completed. So make sure
we do things in the proper order, Or it results that command interrupt
is ignored so it can cause unexpected operations. This is founded at some
toshiba emmc with the bellow warning.

"mmc0: Got command interrupt 0x00000001 even though
no command operation was in progress."

This issue has been also reported by Youssef TRIKI:
It is not specific to Toshiba devices, and happens with eMMC devices
as well as SD card which support Auto-CMD12 rather than CMD23.

Also, similar patch is submitted by:
Gwendal Grignou &lt;gwendal@chromium.org&gt;

Changes since v1:
 Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git
 and Tested if issue is fixed again.

Signed-off-by: Hankyung Yu &lt;hankyung.yu@lge.com&gt;
Signed-off-by: Chanho Min &lt;chanho.min@lge.com&gt;
Tested-by: Youssef TRIKI &lt;youssef.triki@st.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: Use mmc core regulator infrastucture</title>
<updated>2014-07-09T09:25:59+00:00</updated>
<author>
<name>Tim Kryger</name>
<email>tim.kryger@gmail.com</email>
</author>
<published>2014-06-13T17:13:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3a48edc4bd68f841c07c7bc86358d2f02133f247'/>
<id>urn:sha1:3a48edc4bd68f841c07c7bc86358d2f02133f247</id>
<content type='text'>
Switch the common SDHCI code over to use mmc_host's regulator pointers
and remove the ones in the sdhci_host structure.  Additionally, use the
common mmc_regulator_get_supply function to get the regulators and set
the ocr_avail mask.

This change sets the ocr_avail directly based upon the voltage ranges
supported which ensures ocr_avail is set correctly while allowing the
use of regulators that can't provide exactly 1.8v, 3.0v, or 3.3v.

Signed-off-by: Tim Kryger &lt;tim.kryger@gmail.com&gt;
Signed-off-by: Markus Mayer &lt;markus.mayer@linaro.org&gt;
Reviewed-by: Matt Porter &lt;mporter@linaro.org&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: track whether preset mode is currently enabled in hardware</title>
<updated>2014-05-22T12:33:30+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T12:00:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=da91a8f9c0f56d75b35bfe2e2456187ab55b3639'/>
<id>urn:sha1:da91a8f9c0f56d75b35bfe2e2456187ab55b3639</id>
<content type='text'>
Track whether preset mode is currently enabled in hardware, and use that
when making decisions elsewhere in the code rather than reading the
register and checking the bit.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: cache timing information locally</title>
<updated>2014-05-22T12:33:25+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:59:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d975f121011a58223c7936ab483c3374a83236c3'/>
<id>urn:sha1:d975f121011a58223c7936ab483c3374a83236c3</id>
<content type='text'>
Rather than reading back the timing information from the registers,
cache it locally.  This allows implementations to translate the UHS
timing by overriding the set_uhs_signaling() method as required
without also having to emulate the SDHCI_HOST_CONTROL2 register.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
[Ulf Hansson] Resolved conflict
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: convert sdhci_set_clock() into a library function</title>
<updated>2014-05-22T11:26:32+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:58:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1771059cf5f9c09e37ef6315df8acf120f2642fc'/>
<id>urn:sha1:1771059cf5f9c09e37ef6315df8acf120f2642fc</id>
<content type='text'>
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: move FSL ESDHC reset handling quirk into esdhc code</title>
<updated>2014-05-22T11:26:28+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:57:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0718e59ae259f7c48155b4e852d8b0632d59028e'/>
<id>urn:sha1:0718e59ae259f7c48155b4e852d8b0632d59028e</id>
<content type='text'>
The Freescale esdhc driver is the only driver which needs the interrupt
registers restored after a reset.  Move this quirk to be part of the
ESDHC driver implementation.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: more efficient interrupt enable register handling</title>
<updated>2014-05-22T11:26:26+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:56:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b537f94ce19583de1882f539a5cc49aa99260aca'/>
<id>urn:sha1:b537f94ce19583de1882f539a5cc49aa99260aca</id>
<content type='text'>
Rather than wasting cycles read-modify-writing the interrupt enable
registers, cache the value locally instead.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: push card_tasklet into threaded irq handler</title>
<updated>2014-05-22T11:26:25+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:55:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3560db8e247aa35bc6b287ec7ec51cd41abd512e'/>
<id>urn:sha1:3560db8e247aa35bc6b287ec7ec51cd41abd512e</id>
<content type='text'>
There's no requirement to have the card tasklet separate now that we
have a threaded interrupt handler, so kill this and move the called
code into the threaded part of the handler.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
<entry>
<title>mmc: sdhci: convert to new SDIO IRQ handling</title>
<updated>2014-05-22T11:26:24+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2014-04-25T11:55:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=781e989cf593c71d26bdca74f5e77b3651fc060e'/>
<id>urn:sha1:781e989cf593c71d26bdca74f5e77b3651fc060e</id>
<content type='text'>
Use a generic threaded interrupt handler for SDIO interrupt handling,
rather than allowing the SDIO core code to buggily spawn its own
thread.  This results in host drivers to be more in control of how
SDIO interrupts are acknowledged in the hardware, rather than having
the internals of the SDIO core placed upon them, possibly resulting
in sub-standard handling.

At least one SDHCI implementation specifies a very specific sequence
to deal with a card interrupt.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Tested-by: Markus Pargmann &lt;mpa@pengutronix.de&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Signed-off-by: Chris Ball &lt;chris@printf.net&gt;
</content>
</entry>
</feed>
