kernel/linux.git/include/linux/mlx5/port.h, branch v6.6.131Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.1312024-09-18T17:24:08+00:00IB/mlx5: Rename 400G_8X speed to comply to naming convention2024-09-18T17:24:08+00:00Patrisious Haddadphaddad@nvidia.com2023-09-20T10:07:43+00:00urn:sha1:4ce59074d53ca12dfefd7221149401d426b31994
[ Upstream commit b28ad32442bec2f0d9cb660d7d698a1a53c13d08 ]
Rename 400G_8X speed to comply to naming convention.
Signed-off-by: Patrisious Haddad <phaddad@nvidia.com>
Reviewed-by: Mark Zhang <markzhang@nvidia.com>
Link: https://lore.kernel.org/r/ac98447cac8379a43fbdb36d56e5fb2b741a97ff.1695204156.git.leon@kernel.org
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Stable-dep-of: 80bf474242b2 ("net/mlx5e: Add missing link mode to ptys2ext_ethtool_map")
Signed-off-by: Sasha Levin <sashal@kernel.org>
net/mlx5: Move needed PTYS functions to core layer2023-03-16T05:12:08+00:00Gal Pressmangal@nvidia.com2023-03-14T05:42:29+00:00urn:sha1:028522e2844393abc44f7bd7477eb4a455f01579
Downstream patches require devlink params to access the PTYS register,
move the needed functions from mlx5e to the core layer.
Signed-off-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Link: https://lore.kernel.org/r/20230314054234.267365-11-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
IB/mlx5: Fix undefined behavior due to shift overflowing the constant2022-04-06T07:15:03+00:00Borislav Petkovbp@suse.de2022-04-05T15:15:16+00:00urn:sha1:0276bd3a94c072de3f69b5afe6224e488cc76635
Fix:
drivers/infiniband/hw/mlx5/main.c: In function ‘translate_eth_legacy_proto_oper’:
drivers/infiniband/hw/mlx5/main.c:370:2: error: case label does not reduce to an integer constant
case MLX5E_PROT_MASK(MLX5E_50GBASE_KR2):
^~~~
See https://lore.kernel.org/r/YkwQ6%2BtIH8GQpuct@zn.tnic for the gory
details as to why it triggers with older gccs only.
Link: https://lore.kernel.org/all/20220405151517.29753-11-bp@alien8.de
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Leon Romanovsky <leon@kernel.org>
Cc: Saeed Mahameed <saeedm@nvidia.com>
Cc: linux-rdma@vger.kernel.org
Cc: netdev@vger.kernel.org
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
net/mlx5: Parse module mapping using mlx5_ifc2022-03-11T07:38:25+00:00Gal Pressmangal@nvidia.com2022-01-17T13:53:06+00:00urn:sha1:fcb610a86c53dfcfbb2aa62e704481112752f367
The assumption that the first byte in the module mapping dword is the
module number shouldn't be hard-coded in the driver, but come from
mlx5_ifc structs.
While at it, fix the incorrect width for the 'rx_lane' and 'tx_lane'
fields.
Signed-off-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
net/mlx5: Query the maximum MCIA register read size from firmware2022-03-11T07:38:24+00:00Gal Pressmangal@nvidia.com2022-01-17T13:14:44+00:00urn:sha1:271907ee2f29cd1078fd219f0778fd824fb1971c
The MCIA register supports either 12 or 32 dwords, use the correct value
by querying the capability from the MCAM register.
Signed-off-by: Gal Pressman <gal@nvidia.com>
Reviewed-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
net/mlx5: Add support for DSFP module EEPROM dumps2021-04-11T23:34:56+00:00Vladyslav Tarasiukvladyslavt@nvidia.com2021-04-09T08:06:37+00:00urn:sha1:4c88fa412a100f925b8ab1aa952a672895f69d35
Allow the driver to recognise DSFP transceiver module ID and therefore
allow its EEPROM dumps using ethtool.
Signed-off-by: Vladyslav Tarasiuk <vladyslavt@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net/mlx5: Implement get_module_eeprom_by_page()2021-04-11T23:34:56+00:00Vladyslav Tarasiukvladyslavt@nvidia.com2021-04-09T08:06:36+00:00urn:sha1:e109d2b204daa223e6d3cdaa369071c3ea96dcbf
Implement ethtool_ops::get_module_eeprom_by_page() to enable
support of new SFP standards.
Signed-off-by: Vladyslav Tarasiuk <vladyslavt@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
net/mlx5: Refactor module EEPROM query2021-04-11T23:34:56+00:00Vladyslav Tarasiukvladyslavt@nvidia.com2021-04-09T08:06:35+00:00urn:sha1:e19b0a3474ab9ef90dd110af9f39fc87329755f1
Prepare for ethtool_ops::get_module_eeprom_data() implementation by
extracting common part of mlx5_query_module_eeprom() into a separate
function.
Signed-off-by: Vladyslav Tarasiuk <vladyslavt@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
RDMA/mlx5: Delete duplicated mlx5_ptys_width enum2020-09-17T16:33:03+00:00Aharon Landauaharonl@mellanox.com2020-09-17T09:02:22+00:00urn:sha1:e27014bdb47eb435f78573685f4196c07329f1f7
Combine two same enums to avoid duplication.
Signed-off-by: Aharon Landau <aharonl@mellanox.com>
Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
net/mlx5: Refactor query port speed functions2020-09-17T16:33:02+00:00Aharon Landauaharonl@mellanox.com2020-09-17T09:02:21+00:00urn:sha1:639bf4415cadff4c18e13aa5cb0dba2d443e3aa7
The functions mlx5_query_port_link_width_oper and
mlx5_query_port_ib_proto_oper are always called together, so combine them
to a new function called mlx5_query_port_oper to avoid duplication.
And while the mlx5i_get_port_settings is the same as
mlx5_query_port_oper therefore let's remove it.
According to the IB spec link_width_oper and ib_proto_oper should be u16
and not as written u8, so perform casting as a preparation to cross-RDMA
patch which will fix that type for all drivers in the RDMA subsystem.
Fixes: ada68c31ba9c ("net/mlx5: Introduce a new header file for physical port functions")
Signed-off-by: Aharon Landau <aharonl@mellanox.com>
Reviewed-by: Michael Guralnik <michaelgur@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>