<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/mlx5/port.h, branch v5.18.2</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.18.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2022-03-11T07:38:25+00:00</updated>
<entry>
<title>net/mlx5: Parse module mapping using mlx5_ifc</title>
<updated>2022-03-11T07:38:25+00:00</updated>
<author>
<name>Gal Pressman</name>
<email>gal@nvidia.com</email>
</author>
<published>2022-01-17T13:53:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fcb610a86c53dfcfbb2aa62e704481112752f367'/>
<id>urn:sha1:fcb610a86c53dfcfbb2aa62e704481112752f367</id>
<content type='text'>
The assumption that the first byte in the module mapping dword is the
module number shouldn't be hard-coded in the driver, but come from
mlx5_ifc structs.

While at it, fix the incorrect width for the 'rx_lane' and 'tx_lane'
fields.

Signed-off-by: Gal Pressman &lt;gal@nvidia.com&gt;
Reviewed-by: Maxim Mikityanskiy &lt;maximmi@nvidia.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@nvidia.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Query the maximum MCIA register read size from firmware</title>
<updated>2022-03-11T07:38:24+00:00</updated>
<author>
<name>Gal Pressman</name>
<email>gal@nvidia.com</email>
</author>
<published>2022-01-17T13:14:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=271907ee2f29cd1078fd219f0778fd824fb1971c'/>
<id>urn:sha1:271907ee2f29cd1078fd219f0778fd824fb1971c</id>
<content type='text'>
The MCIA register supports either 12 or 32 dwords, use the correct value
by querying the capability from the MCAM register.

Signed-off-by: Gal Pressman &lt;gal@nvidia.com&gt;
Reviewed-by: Maxim Mikityanskiy &lt;maximmi@nvidia.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@nvidia.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Add support for DSFP module EEPROM dumps</title>
<updated>2021-04-11T23:34:56+00:00</updated>
<author>
<name>Vladyslav Tarasiuk</name>
<email>vladyslavt@nvidia.com</email>
</author>
<published>2021-04-09T08:06:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4c88fa412a100f925b8ab1aa952a672895f69d35'/>
<id>urn:sha1:4c88fa412a100f925b8ab1aa952a672895f69d35</id>
<content type='text'>
Allow the driver to recognise DSFP transceiver module ID and therefore
allow its EEPROM dumps using ethtool.

Signed-off-by: Vladyslav Tarasiuk &lt;vladyslavt@nvidia.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Implement get_module_eeprom_by_page()</title>
<updated>2021-04-11T23:34:56+00:00</updated>
<author>
<name>Vladyslav Tarasiuk</name>
<email>vladyslavt@nvidia.com</email>
</author>
<published>2021-04-09T08:06:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e109d2b204daa223e6d3cdaa369071c3ea96dcbf'/>
<id>urn:sha1:e109d2b204daa223e6d3cdaa369071c3ea96dcbf</id>
<content type='text'>
Implement ethtool_ops::get_module_eeprom_by_page() to enable
support of new SFP standards.

Signed-off-by: Vladyslav Tarasiuk &lt;vladyslavt@nvidia.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Refactor module EEPROM query</title>
<updated>2021-04-11T23:34:56+00:00</updated>
<author>
<name>Vladyslav Tarasiuk</name>
<email>vladyslavt@nvidia.com</email>
</author>
<published>2021-04-09T08:06:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e19b0a3474ab9ef90dd110af9f39fc87329755f1'/>
<id>urn:sha1:e19b0a3474ab9ef90dd110af9f39fc87329755f1</id>
<content type='text'>
Prepare for ethtool_ops::get_module_eeprom_data() implementation by
extracting common part of mlx5_query_module_eeprom() into a separate
function.

Signed-off-by: Vladyslav Tarasiuk &lt;vladyslavt@nvidia.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>RDMA/mlx5: Delete duplicated mlx5_ptys_width enum</title>
<updated>2020-09-17T16:33:03+00:00</updated>
<author>
<name>Aharon Landau</name>
<email>aharonl@mellanox.com</email>
</author>
<published>2020-09-17T09:02:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e27014bdb47eb435f78573685f4196c07329f1f7'/>
<id>urn:sha1:e27014bdb47eb435f78573685f4196c07329f1f7</id>
<content type='text'>
Combine two same enums to avoid duplication.

Signed-off-by: Aharon Landau &lt;aharonl@mellanox.com&gt;
Reviewed-by: Michael Guralnik &lt;michaelgur@nvidia.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@nvidia.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Refactor query port speed functions</title>
<updated>2020-09-17T16:33:02+00:00</updated>
<author>
<name>Aharon Landau</name>
<email>aharonl@mellanox.com</email>
</author>
<published>2020-09-17T09:02:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=639bf4415cadff4c18e13aa5cb0dba2d443e3aa7'/>
<id>urn:sha1:639bf4415cadff4c18e13aa5cb0dba2d443e3aa7</id>
<content type='text'>
The functions mlx5_query_port_link_width_oper and
mlx5_query_port_ib_proto_oper are always called together, so combine them
to a new function called mlx5_query_port_oper to avoid duplication.

And while the mlx5i_get_port_settings is the same as
mlx5_query_port_oper therefore let's remove it.

According to the IB spec link_width_oper and ib_proto_oper should be u16
and not as written u8, so perform casting as a preparation to cross-RDMA
patch which will fix that type for all drivers in the RDMA subsystem.

Fixes: ada68c31ba9c ("net/mlx5: Introduce a new header file for physical port functions")
Signed-off-by: Aharon Landau &lt;aharonl@mellanox.com&gt;
Reviewed-by: Michael Guralnik &lt;michaelgur@nvidia.com&gt;
Signed-off-by: Leon Romanovsky &lt;leonro@nvidia.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5: Added support for 100Gbps per lane link modes</title>
<updated>2020-07-08T22:30:42+00:00</updated>
<author>
<name>Meir Lichtinger</name>
<email>meirl@mellanox.com</email>
</author>
<published>2020-07-07T03:42:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=12fdafb817c6cde87a4fa0e674e66b0226a0889d'/>
<id>urn:sha1:12fdafb817c6cde87a4fa0e674e66b0226a0889d</id>
<content type='text'>
This patch exposes new link modes using 100Gbps per lane, including 100G,
200G and 400G modes.

Signed-off-by: Meir Lichtinger &lt;meirl@mellanox.com&gt;
Reviewed-by: Aya Levin &lt;ayal@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net/mlx5e: ethtool, Add support for EEPROM high pages query</title>
<updated>2019-05-01T21:39:16+00:00</updated>
<author>
<name>Erez Alfasi</name>
<email>ereza@mellanox.com</email>
</author>
<published>2019-03-21T13:02:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a708fb7b1f8dcc7a8ed949839958cd5d812dd939'/>
<id>urn:sha1:a708fb7b1f8dcc7a8ed949839958cd5d812dd939</id>
<content type='text'>
Add the support to read additional EEPROM information from high pages.
Information for modules such as SFF-8436 and SFF-8636:
 1) Application select table
 2) User writable EEPROM
 3) Thresholds and alarms

Signed-off-by: Erez Alfasi &lt;ereza@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
<entry>
<title>net/mlx5e: Fix GRE key by controlling port tunnel entropy calculation</title>
<updated>2019-02-22T21:38:23+00:00</updated>
<author>
<name>Eli Britstein</name>
<email>elibr@mellanox.com</email>
</author>
<published>2019-01-14T08:07:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=97417f6182f80a80c9b4443f282ef707be74dade'/>
<id>urn:sha1:97417f6182f80a80c9b4443f282ef707be74dade</id>
<content type='text'>
Flow entropy is calculated on the inner packet headers and used for
flow distribution in processing, routing etc. For GRE-type
encapsulations the entropy value is placed in the eight LSB of the key
field in the GRE header as defined in NVGRE RFC 7637. For UDP based
encapsulations the entropy value is placed in the source port of the
UDP header.
The hardware may support entropy calculation specifically for GRE and
for all tunneling protocols. With commit df2ef3bff193 ("net/mlx5e: Add
GRE protocol offloading") GRE is offloaded, but the hardware is
configured by default to calculate flow entropy so packets transmitted
on the wire have a wrong key. To support UDP based tunnels (i.e VXLAN),
GRE (i.e. no flow entropy) and NVGRE (i.e. with flow entropy) the
hardware behaviour must be controlled by the driver.

Ensure port entropy calculation is enabled for offloaded VXLAN tunnels
and disable port entropy calculation in the presence of offloaded GRE
tunnels by monitoring the presence of entropy enabling tunnels (i.e
VXLAN) and entropy disabing tunnels (i.e GRE).

Fixes: df2ef3bff193 ("net/mlx5e: Add GRE protocol offloading")
Signed-off-by: Eli Britstein &lt;elibr@mellanox.com&gt;
Reviewed-by: Oz Shlomo &lt;ozsh@mellanox.com&gt;
Reviewed-by: Roi Dayan &lt;roid@mellanox.com&gt;
Signed-off-by: Saeed Mahameed &lt;saeedm@mellanox.com&gt;
</content>
</entry>
</feed>
