<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/hw_bitfield.h, branch v6.19.11</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.19.11</id>
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<updated>2025-09-02T23:59:16+00:00</updated>
<entry>
<title>bitmap: introduce hardware-specific bitfield operations</title>
<updated>2025-09-02T23:59:16+00:00</updated>
<author>
<name>Nicolas Frattaroli</name>
<email>nicolas.frattaroli@collabora.com</email>
</author>
<published>2025-08-25T08:28:21+00:00</published>
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<id>urn:sha1:21368fcbb124d51b5d8bd8fa0a286a23c34a0888</id>
<content type='text'>
Hardware of various vendors, but very notably Rockchip, often uses
32-bit registers where the upper 16-bit half of the register is a
write-enable mask for the lower half.

This type of hardware setup allows for more granular concurrent register
write access.

Over the years, many drivers have hand-rolled their own version of this
macro, usually without any checks, often called something like
HIWORD_UPDATE or FIELD_PREP_HIWORD, commonly with slightly different
semantics between them.

Clearly there is a demand for such a macro, and thus the demand should
be satisfied in a common header file. As this is a convention that spans
across multiple vendors, and similar conventions may also have
cross-vendor adoption, it's best if it lives in a vendor-agnostic header
file that can be expanded over time.

Add hw_bitfield.h with two macros: FIELD_PREP_WM16, and
FIELD_PREP_WM16_CONST. The latter is a version that can be used in
initializers, like FIELD_PREP_CONST.

Suggested-by: Yury Norov (NVIDIA) &lt;yury.norov@gmail.com&gt;
Signed-off-by: Nicolas Frattaroli &lt;nicolas.frattaroli@collabora.com&gt;
Acked-by: Jakub Kicinski &lt;kuba@kernel.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Yury Norov (NVIDIA) &lt;yury.norov@gmail.com&gt;
</content>
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