<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/linux/coresight.h, branch v6.6.132</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.132'/>
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<updated>2025-04-10T12:37:32+00:00</updated>
<entry>
<title>coresight-etm4x: add isb() before reading the TRCSTATR</title>
<updated>2025-04-10T12:37:32+00:00</updated>
<author>
<name>Yuanfang Zhang</name>
<email>quic_yuanfang@quicinc.com</email>
</author>
<published>2025-01-16T09:04:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a8b3879b2e3b843129d928d0bf2372687ec7be3f'/>
<id>urn:sha1:a8b3879b2e3b843129d928d0bf2372687ec7be3f</id>
<content type='text'>
[ Upstream commit 4ff6039ffb79a4a8a44b63810a8a2f2b43264856 ]

As recommended by section 4.3.7 ("Synchronization when using system
instructions to progrom the trace unit") of ARM IHI 0064H.b, the
self-hosted trace analyzer must perform a Context synchronization
event between writing to the TRCPRGCTLR and reading the TRCSTATR.
Additionally, add an ISB between the each read of TRCSTATR on
coresight_timeout() when using system instructions to program the
trace unit.

Fixes: 1ab3bb9df5e3 ("coresight: etm4x: Add necessary synchronization for sysreg access")
Signed-off-by: Yuanfang Zhang &lt;quic_yuanfang@quicinc.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20250116-etm_sync-v4-1-39f2b05e9514@quicinc.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>coresight: etm4x: Change etm4_platform_driver driver for MMIO devices</title>
<updated>2023-07-26T15:46:25+00:00</updated>
<author>
<name>Anshuman Khandual</name>
<email>anshuman.khandual@arm.com</email>
</author>
<published>2023-07-10T06:24:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=73d779a03a76ac3fe26832cba3c9ad04194af595'/>
<id>urn:sha1:73d779a03a76ac3fe26832cba3c9ad04194af595</id>
<content type='text'>
Add support for handling MMIO based devices via platform driver. We need to
make sure that :

1) The APB clock, if present is enabled at probe and via runtime_pm ops
2) Use the ETM4x architecture or CoreSight architecture registers to
   identify a device as CoreSight ETM4x, instead of relying a white list of
   "Peripheral IDs"

The driver doesn't get to handle the devices yet, until we wire the ACPI
changes to move the devices to be handled via platform driver than the
etm4_amba driver.

Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Cc: Leo Yan &lt;leo.yan@linaro.org&gt;
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230710062500.45147-5-anshuman.khandual@arm.com
</content>
</entry>
<entry>
<title>coresight: etm4x: Drop pid argument from etm4_probe()</title>
<updated>2023-07-26T15:46:25+00:00</updated>
<author>
<name>Anshuman Khandual</name>
<email>anshuman.khandual@arm.com</email>
</author>
<published>2023-07-10T06:24:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5a1c7097472fcde5745654e3a59f55140903d9cc'/>
<id>urn:sha1:5a1c7097472fcde5745654e3a59f55140903d9cc</id>
<content type='text'>
Coresight device pid can be retrieved from its iomem base address, which is
stored in 'struct etm4x_drvdata'. This drops pid argument from etm4_probe()
and 'struct etm4_init_arg'. Instead etm4_check_arch_features() derives the
coresight device pid with a new helper coresight_get_pid(), right before it
is consumed in etm4_hisi_match_pid().

Cc: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;
Cc: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Cc: Mike Leach &lt;mike.leach@linaro.org&gt;
Cc: Leo Yan &lt;leo.yan@linaro.org&gt;
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual &lt;anshuman.khandual@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230710062500.45147-4-anshuman.khandual@arm.com
</content>
</entry>
<entry>
<title>Coresight: Add coresight dummy driver</title>
<updated>2023-06-15T07:50:23+00:00</updated>
<author>
<name>Hao Zhang</name>
<email>quic_hazha@quicinc.com</email>
</author>
<published>2023-06-02T08:41:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9d3ba0b6c056918355cf36094d6ed63cdd01a2ab'/>
<id>urn:sha1:9d3ba0b6c056918355cf36094d6ed63cdd01a2ab</id>
<content type='text'>
Some Coresight devices that kernel don't have permission to access or
configure. For these devices, a dummy driver is needed to register them as
Coresight devices. The module may also be used to define components that
may not have any programming interfaces, so that paths can be created
in the driver. It provides Coresight API for operations on dummy devices,
such as enabling and disabling them. It also provides the Coresight dummy
sink/source paths for debugging.

Signed-off-by: Hao Zhang &lt;quic_hazha@quicinc.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230602084149.40031-2-quic_hazha@quicinc.com
</content>
</entry>
<entry>
<title>coresight: Fix CTI module refcount leak by making it a helper device</title>
<updated>2023-06-05T14:46:47+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1b5b1646e63d5ce43469e00680b8c1a3a1e034cd'/>
<id>urn:sha1:1b5b1646e63d5ce43469e00680b8c1a3a1e034cd</id>
<content type='text'>
The CTI module has some hard coded refcounting code that has a leak.
For example running perf and then trying to unload it fails:

  perf record -e cs_etm// -a -- ls
  rmmod coresight_cti

  rmmod: ERROR: Module coresight_cti is in use

The coresight core already handles references of devices in use, so by
making CTI a normal helper device, we get working refcounting for free.

Reviewed-by: Mike Leach  &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-14-james.clark@arm.com
</content>
</entry>
<entry>
<title>coresight: Enable and disable helper devices adjacent to the path</title>
<updated>2023-06-05T14:46:47+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6148652807ba89b0c9af05ebed3e005b626f90eb'/>
<id>urn:sha1:6148652807ba89b0c9af05ebed3e005b626f90eb</id>
<content type='text'>
Currently CATU is the only helper device, and its enable and disable
calls are hard coded. To allow more helper devices to be added in a
generic way, remove these hard coded calls and just enable and disable
all helper devices.

This has to apply to helpers adjacent to the path, because they will
never be in the path. CATU was already discovered in this way, so
there is no change there.

One change that is needed is for CATU to call back into ETR to allocate
the buffer. Because the enable call was previously hard coded, it was
done at a point where the buffer was already allocated, but this is no
longer the case.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-13-james.clark@arm.com
</content>
</entry>
<entry>
<title>coresight: Make refcount a property of the connection</title>
<updated>2023-06-05T14:46:46+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=ae7f2b5a7b569f8ede4af9e215515e5a0b824edd'/>
<id>urn:sha1:ae7f2b5a7b569f8ede4af9e215515e5a0b824edd</id>
<content type='text'>
This removes the need to do an additional lookup for the total number
of ports used and also removes the need to allocate an array of
refcounts which is just another representation of a connection array.

This was only used for link type devices, for regular devices a single
refcount on the coresight device is used.

There is a both an input and output refcount in case two link type
devices are connected together so that they don't overwrite each other's
counts.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-11-james.clark@arm.com
</content>
</entry>
<entry>
<title>coresight: Store in-connections as well as out-connections</title>
<updated>2023-06-05T14:46:46+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e3f4e68797a960869ccae556ad63163b3dc470a2'/>
<id>urn:sha1:e3f4e68797a960869ccae556ad63163b3dc470a2</id>
<content type='text'>
This will allow CATU to get its associated ETR in a generic way where
currently the enable path has some hard coded searches which avoid
the need to store input connections.

This also means that the full search for connected devices on removal
can be replaced with a loop through only the input and output devices.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-10-james.clark@arm.com
</content>
</entry>
<entry>
<title>coresight: Store pointers to connections rather than an array of them</title>
<updated>2023-06-05T14:46:46+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4e8fe7e5c3a5e48295a6745727a6703adab8ff7f'/>
<id>urn:sha1:4e8fe7e5c3a5e48295a6745727a6703adab8ff7f</id>
<content type='text'>
This will allow the same connection object to be referenced via the
input connection list in a later commit rather than duplicating them.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-8-james.clark@arm.com
</content>
</entry>
<entry>
<title>coresight: Dynamically add connections</title>
<updated>2023-06-05T14:46:46+00:00</updated>
<author>
<name>James Clark</name>
<email>james.clark@arm.com</email>
</author>
<published>2023-04-25T14:35:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3d4ff657e454f8dba3e5e268e731e6e28c6031c1'/>
<id>urn:sha1:3d4ff657e454f8dba3e5e268e731e6e28c6031c1</id>
<content type='text'>
Add a function for adding connections dynamically. This also removes
the 1:1 mapping between port number and the index into the connections
array. The only place this mapping was used was in the warning for
duplicate output ports, which has been replaced by a search. Other
uses of the port number already use the port member variable.

Being able to dynamically add connections will allow other devices like
CTI to re-use the connection mechanism despite not having explicit
connections described in the DT.

The connections array is now no longer sparse, so child_fwnode doesn't
need to be checked as all connections have a target node. Because the
array is no longer sparse, the high in and out port numbers are required
for the refcount arrays. But these will also be removed in a later
commit when the refcount is made a property of the connection.

Reviewed-by: Mike Leach &lt;mike.leach@linaro.org&gt;
Signed-off-by: James Clark &lt;james.clark@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Link: https://lore.kernel.org/r/20230425143542.2305069-7-james.clark@arm.com
</content>
</entry>
</feed>
