kernel/linux.git/include/dt-bindings/clock/sun50i-a64-ccu.h, branch v6.6.128Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.1282025-02-08T08:51:55+00:00dt-bindings: clock: sunxi: Export PLL_VIDEO_2X and PLL_MIPI2025-02-08T08:51:55+00:00Vasily Khoruzhickanarsoul@gmail.com2025-01-04T07:36:57+00:00urn:sha1:11f5bdeff93e7a1da338c0531d51b196742b84ae
[ Upstream commit 9897831de614f1d8d5184547f0e7bf7665eed436 ]
Export PLL_VIDEO_2X and PLL_MIPI, these will be used to explicitly
select TCON0 clock parent in dts
Fixes: ca1170b69968 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Frank Oltmanns <frank@oltmanns.dev> # on PinePhone
Tested-by: Stuart Gathman <stuart@gathman.org> # on OG Pinebook
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patch.msgid.link/20250104074035.1611136-2-anarsoul@gmail.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Stable-dep-of: 0f368cb7ef10 ("clk: sunxi-ng: a64: drop redundant CLK_PLL_VIDEO0_2X and CLK_PLL_MIPI")
Signed-off-by: Sasha Levin <sashal@kernel.org>
dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq2021-11-23T10:29:35+00:00Samuel Hollandsamuel@sholland.org2021-11-18T03:18:36+00:00urn:sha1:71b597ef5d46a326fb0d5cbfc1c6ff1d73cdc7f9
The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.
Export this clock for SoCs which will be getting a devfreq driver.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
clk: sunxi-ng: a64: Export MBUS clock2020-02-11T06:49:14+00:00Jernej Skrabecjernej.skrabec@siol.net2020-02-10T17:06:53+00:00urn:sha1:1de8493069b8f510e586242c1b4329cd3c9b6fb9
MBUS clock will be referenced in MBUS controller node.
Export it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS2020-01-04T08:18:08+00:00Vasily Khoruzhickanarsoul@gmail.com2020-01-04T06:35:04+00:00urn:sha1:a9b5c6717837840adc5d58ab75f232905a3af9f7
Export CLK_CPUX so we can reference it in CPU node.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro2018-09-05T07:19:59+00:00Jagan Tekijagan@amarulasolutions.com2018-09-04T04:40:49+00:00urn:sha1:8b2a37870419f4aa6e6f837aa8ec627eae984010
Allwinner A64 HDMI PHY clock has PLL_VIDEO0 as a parent.
Include the macro on dt-bindings so-that the same can be used
while defining CCU clock phandles.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM2017-05-31T19:57:30+00:00Chen-Yu Tsaiwens@csie.org2017-05-31T07:58:23+00:00urn:sha1:d85da227c3ae43d9ca513d60f244213cb4e55485
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.
Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
clk: sunxi-ng: Add A64 clocks2016-11-03T08:06:18+00:00Maxime Ripardmaxime.ripard@free-electrons.com2016-07-06T06:31:34+00:00urn:sha1:c6a0637460c29799f1e63a6a4a65bda22caf4a54
Add the A64 CCU clocks set.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>