Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=v4.10.13 2017-04-12T10:42:03+00:00 2017-04-12T10:42:03+00:00 Thomas Hellstrom thellstrom@vmware.com 2017-03-27T09:21:25+00:00 urn:sha1:009eb75f7fb0fac9f2e896b6c70662a546a9c8d7 commit fe25deb7737ce6c0879ccf79c99fa1221d428bf2 upstream. Previously, when a surface was opened using a legacy (non prime) handle, it was verified to have been created by a client in the same master realm. Relax this so that opening is also allowed recursively if the client already has the surface open. This works around a regression in svga mesa where opening of a shared surface is used recursively to obtain surface information. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Sinclair Yeh <syeh@vmware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2016-10-28T01:33:52+00:00 Dave Airlie airlied@redhat.com 2016-10-28T01:33:52+00:00 urn:sha1:220196b38483be6d84a295d318d48595f65da443 Pull request already again to get the s/fence/dma_fence/ stuff in and allow everyone to resync. Otherwise really just misc stuff all over, and a new bridge driver. * tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel: drm/bridge: fix platform_no_drv_owner.cocci warnings drm/bridge: fix semicolon.cocci warnings drm: Print some debug/error info during DP dual mode detect drm: mark drm_of_component_match_add dummy inline drm/bridge: add Silicon Image SiI8620 driver dt-bindings: add Silicon Image SiI8620 bridge bindings video: add header file for Mobile High-Definition Link (MHL) interface drm: convert DT component matching to component_match_add_release() dma-buf: Rename struct fence to dma_fence dma-buf/fence: add an lockdep_assert_held() drm/dp: Factor out helper to distinguish between branch and sink devices drm/edid: Only print the bad edid when aborting drm/msm: add missing header dependencies drm/msm/adreno: move function declarations to header file drm/i2c/tda998x: mark symbol static where possible doc: add missing docbook parameter for fence-array drm: RIP mode_config->rotation_property drm/msm/mdp5: Advertize 180 degree rotation drm/msm/mdp5: Use per-plane rotation property 2016-10-25T18:44:04+00:00 Christian König christian.koenig@amd.com 2016-08-30T15:26:04+00:00 urn:sha1:a2ab19fed9d1dc5a7a2ced44f4b289885c522a8f This way the driver can decide if it is valuable to evict a BO or not. The current implementation is added as default to all existing drivers. v2: fix some typos found during internal testing Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-10-25T18:44:03+00:00 Christian König christian.koenig@amd.com 2016-08-30T13:01:27+00:00 urn:sha1:585ffd65441a4aea7e762d17f7a248d07cd1c9ac A few 80chars issues and spaces at wrong places. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-10-25T12:40:39+00:00 Chris Wilson chris@chris-wilson.co.uk 2016-10-25T12:00:45+00:00 urn:sha1:f54d1867005c3323f5d8ad83eed823e84226c429 I plan to usurp the short name of struct fence for a core kernel struct, and so I need to rename the specialised fence/timeline for DMA operations to make room. A consensus was reached in https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html that making clear this fence applies to DMA operations was a good thing. Since then the patch has grown a bit as usage increases, so hopefully it remains a good thing! (v2...: rebase, rerun spatch) v3: Compile on msm, spotted a manual fixup that I broke. v4: Try again for msm, sorry Daniel coccinelle script: @@ @@ - struct fence + struct dma_fence @@ @@ - struct fence_ops + struct dma_fence_ops @@ @@ - struct fence_cb + struct dma_fence_cb @@ @@ - struct fence_array + struct dma_fence_array @@ @@ - enum fence_flag_bits + enum dma_fence_flag_bits @@ @@ ( - fence_init + dma_fence_init | - fence_release + dma_fence_release | - fence_free + dma_fence_free | - fence_get + dma_fence_get | - fence_get_rcu + dma_fence_get_rcu | - fence_put + dma_fence_put | - fence_signal + dma_fence_signal | - fence_signal_locked + dma_fence_signal_locked | - fence_default_wait + dma_fence_default_wait | - fence_add_callback + dma_fence_add_callback | - fence_remove_callback + dma_fence_remove_callback | - fence_enable_sw_signaling + dma_fence_enable_sw_signaling | - fence_is_signaled_locked + dma_fence_is_signaled_locked | - fence_is_signaled + dma_fence_is_signaled | - fence_is_later + dma_fence_is_later | - fence_later + dma_fence_later | - fence_wait_timeout + dma_fence_wait_timeout | - fence_wait_any_timeout + dma_fence_wait_any_timeout | - fence_wait + dma_fence_wait | - fence_context_alloc + dma_fence_context_alloc | - fence_array_create + dma_fence_array_create | - to_fence_array + to_dma_fence_array | - fence_is_array + dma_fence_is_array | - trace_fence_emit + trace_dma_fence_emit | - FENCE_TRACE + DMA_FENCE_TRACE | - FENCE_WARN + DMA_FENCE_WARN | - FENCE_ERR + DMA_FENCE_ERR ) ( ... ) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk 2016-09-16T19:53:05+00:00 Alexandre Courbot acourbot@nvidia.com 2016-09-16T09:32:26+00:00 urn:sha1:af1f85ddecfa341e684db950c34a1813d36750db Patch 3d50d4dcb0 exposed the CPU address of DMA-allocated pages as returned by dma_alloc_coherent because Nouveau on Tegra needed it. This is not required anymore - as there were no other users for it, remove it and save some memory for everyone. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-09-14T19:10:43+00:00 Christian König christian.koenig@amd.com 2016-09-08T13:40:38+00:00 urn:sha1:7c732ea64993b9f37daff9bd95b552576304b6d9 Makes more sense to keep that together. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-09-14T19:10:42+00:00 Christian König christian.koenig@amd.com 2016-09-08T13:30:33+00:00 urn:sha1:08614da7041eb59baf729bdcf07c2dbd3d80c63e Either never used or not used in quite a while. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-09-14T19:10:42+00:00 Christian König christian.koenig@amd.com 2016-09-12T11:34:37+00:00 urn:sha1:283cde69aa318f7b2eeb02a7c62b16f69e1d422a Instead of keeping a bunch of potentially unused flags, just define the start for private memory types and remove the rest. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> 2016-08-08T15:33:33+00:00 Michel Dänzer michel.daenzer@amd.com 2016-08-08T03:28:26+00:00 urn:sha1:4499f2acd57b568e8fa2c7908a8a3cf2802629c5 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>