kernel/linux.git/include/drm/bridge, branch linux-6.9.y

drm/bridge: aux-hpd-bridge: correct devm_drm_dp_hpd_bridge_add() stub

2024-06-21T12:40:34+00:00

commit 51474ab44abf907023a8a875e799b07de461e466 upstream. If CONFIG_DRM_AUX_HPD_BRIDGE is not enabled, the aux-bridge.h header provides a stub for the bridge's functions. Correct the arguments list of one of those stubs to match the argument list of the non-stubbed function. Fixes: e5ca263508f7 ("drm/bridge: aux-hpd: separate allocation and registration") Reported-by: kernel test robot Cc: stable Closes: https://lore.kernel.org/oe-kbuild-all/202405110428.TMCfb1Ut-lkp@intel.com/ Cc: Johan Hovold Signed-off-by: Dmitry Baryshkov Reviewed-by: Johan Hovold Link: https://lore.kernel.org/r/20240511-fix-aux-hpd-stubs-v1-1-98dae71dfaec@linaro.org Signed-off-by: Greg Kroah-Hartman Signed-off-by: Greg Kroah-Hartman

drm/bridge: aux-hpd: separate allocation and registration

2024-02-23T15:00:56+00:00

Combining allocation and registration is an anti-pattern that should be avoided. Add two new functions for allocating and registering an dp-hpd bridge with a proper 'devm' prefix so that it is clear that these are device managed interfaces. devm_drm_dp_hpd_bridge_alloc() devm_drm_dp_hpd_bridge_add() The new interface will be used to fix a use-after-free bug in the Qualcomm PMIC GLINK driver and may prevent similar issues from being introduced elsewhere. The existing drm_dp_hpd_bridge_register() is reimplemented using the above and left in place for now. Signed-off-by: Johan Hovold Reviewed-by: Bjorn Andersson Reviewed-by: Dmitry Baryshkov Signed-off-by: Dmitry Baryshkov Link: https://patchwork.freedesktop.org/patch/msgid/20240217150228.5788-3-johan+linaro@kernel.org

drm/bridge: Return NULL instead of plain 0 in drm_dp_hpd_bridge_register() stub

2023-12-07T10:28:03+00:00

sparse complains: drivers/usb/typec/tcpm/qcom/qcom_pmic_typec.c: note: in included file: include/drm/bridge/aux-bridge.h:29:16: sparse: sparse: Using plain integer as NULL pointer Return NULL to clear up the warning. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202312060025.BdeqZrWx-lkp@intel.com/ Fixes: e560518a6c2e ("drm/bridge: implement generic DP HPD bridge") Signed-off-by: Nathan Chancellor Reviewed-by: Bryan O'Donoghue Reviewed-by: Guenter Roeck Signed-off-by: Dmitry Baryshkov Link: https://patchwork.freedesktop.org/patch/msgid/20231205-drm_aux_bridge-fixes-v1-3-d242a0ae9df4@kernel.org

drm/bridge: implement generic DP HPD bridge

2023-12-04T14:07:29+00:00

Several USB-C controllers implement a pretty simple DRM bridge which implements just the HPD notification operations. Add special helper for creating such simple bridges. Acked-by: Neil Armstrong Signed-off-by: Dmitry Baryshkov Link: https://patchwork.freedesktop.org/patch/msgid/20231203114333.1305826-5-dmitry.baryshkov@linaro.org

drm/bridge: add transparent bridge helper

2023-12-04T14:07:29+00:00

Define a helper for creating simple transparent bridges which serve the only purpose of linking devices into the bridge chain up to the last bridge representing the connector. This is especially useful for DP/USB-C bridge chains, which can span across several devices, but do not require any additional functionality from the intermediate bridges. Reviewed-by: Neil Armstrong Signed-off-by: Dmitry Baryshkov Link: https://patchwork.freedesktop.org/patch/msgid/20231203114333.1305826-2-dmitry.baryshkov@linaro.org

drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support

2023-10-16T09:38:42+00:00

Vendor drivers may need to fixup mode due to pixel clock tree limitation, so introduce the ->mode_fixup() callcack to struct dw_mipi_dsi_plat_data and call it at atomic check stage if available. Signed-off-by: Liu Ying Reviewed-by: Robert Foss Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/20230821034008.3876938-5-victor.liu@nxp.com

drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support

2023-10-16T09:38:40+00:00

Introduce ->get_input_bus_fmts() callback to struct dw_mipi_dsi_plat_data so that vendor drivers can implement specific methods to get input bus formats for Synopsys DW MIPI DSI. While at it, implement a generic callback for ->atomic_get_input_bus_fmts(), where we try to get the input bus formats through pdata->get_input_bus_fmts() first. If it's unavailable, fall back to the only format - MEDIA_BUS_FMT_FIXED, which matches the default behavior if ->atomic_get_input_bus_fmts() is not implemented as ->atomic_get_input_bus_fmts()'s kerneldoc indicates. Signed-off-by: Liu Ying Reviewed-by: Robert Foss Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/20230821034008.3876938-3-victor.liu@nxp.com

drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper

2023-10-16T09:38:39+00:00

Add dw_mipi_dsi_get_bridge() helper so that it can be used by vendor drivers which implement vendor specific extensions to Synopsys DW MIPI DSI. Signed-off-by: Liu Ying Reviewed-by: Robert Foss Signed-off-by: Robert Foss Link: https://patchwork.freedesktop.org/patch/msgid/20230821034008.3876938-2-victor.liu@nxp.com

drm/bridge: samsung-dsim: update PLL reference clock

2023-10-09T09:06:22+00:00

The PLL requires a clock frequency in a certain platform-dependent range after the pre-divider. The reference clock for the PLL may change due to changes to it's parent clock. Thus, the frequency may be out of range or unsuited for generating the high speed clock for MIPI DSI. Try to keep the pre-devider small, and set the reference clock close to the upper limit before recalculating the PLL configuration. Use a divider with a power of two for the reference clock as this seems to work best in my tests. Reviewed-by: Marco Felsch Tested-by: Frieder Schrempf # Kontron BL i.MX8MM + Waveshare 10.1inch HDMI LCD (E) Signed-off-by: Michael Tretter Tested-by: Marek Szyprowski Link: https://lore.kernel.org/r/20230818-samsung-dsim-v2-3-846603df0e0a@pengutronix.de Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20230818-samsung-dsim-v2-3-846603df0e0a@pengutronix.de

drm/bridge: samsung-dsim: reread ref clock before configuring PLL

2023-10-09T09:06:22+00:00

The PLL reference clock may change at runtime when its parent clock changes. For example, this may happen on the i.MX8M Nano if the reference clock is a child of the Video PLL. If the pixel clock changes, this may propagate to the Video PLL and as a side effect change the reference clock. Thus, reading the clock rate during probe is not sufficient to correctly configure the PLL for the expected hs clock. Read the actual rate of the reference clock before calculating the PLL configuration parameters. Note that the "samsung,pll-clock-frequency" is always preferred and PLL reference clock is only read from the clock tree if that device tree property is not set. Reviewed-by: Inki Dae Acked-by: Inki Dae Tested-by: Frieder Schrempf # Kontron BL i.MX8MM + Waveshare 10.1inch HDMI LCD (E) Reviewed-by: Marco Felsch Signed-off-by: Michael Tretter Tested-by: Marek Szyprowski Link: https://lore.kernel.org/r/20230818-samsung-dsim-v2-2-846603df0e0a@pengutronix.de Signed-off-by: Neil Armstrong Link: https://patchwork.freedesktop.org/patch/msgid/20230818-samsung-dsim-v2-2-846603df0e0a@pengutronix.de