<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/include/asm-xtensa/unaligned.h, branch linux-2.6.28.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2008-04-29T15:06:27+00:00</updated>
<entry>
<title>kernel: Move arches to use common unaligned access</title>
<updated>2008-04-29T15:06:27+00:00</updated>
<author>
<name>Harvey Harrison</name>
<email>harvey.harrison@gmail.com</email>
</author>
<published>2008-04-29T08:03:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6510d41954dc6a9c8b1dbca7eaca0f23195ca727'/>
<id>urn:sha1:6510d41954dc6a9c8b1dbca7eaca0f23195ca727</id>
<content type='text'>
Unaligned access is ok for the following arches:
cris, m68k, mn10300, powerpc, s390, x86

Arches that use the memmove implementation for native endian, and
the byteshifting for the opposite endianness.
h8300, m32r, xtensa

Packed struct for native endian, byteshifting for other endian:
alpha, blackfin, ia64, parisc, sparc, sparc64, mips, sh

m86knommu is generic_be for Coldfire, otherwise unaligned access is ok.

frv, arm chooses endianness based on compiler settings, uses the byteshifting
versions.  Remove the unaligned trap handler from frv as it is now unused.

v850 is le, uses the byteshifting versions for both be and le.

Remove the now unused asm-generic implementation.

Signed-off-by: Harvey Harrison &lt;harvey.harrison@gmail.com&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Cc: &lt;linux-arch@vger.kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6</title>
<updated>2005-06-24T07:05:22+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>czankel@tensilica.com</email>
</author>
<published>2005-06-24T05:01:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9a8fd5589902153a134111ed7a40f9cca1f83254'/>
<id>urn:sha1:9a8fd5589902153a134111ed7a40f9cca1f83254</id>
<content type='text'>
The attached patches provides part 6 of an architecture implementation for the
Tensilica Xtensa CPU series.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
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