kernel/linux.git/include/acpi/actbl2.h, branch v6.19.11

ACPICA: Add SoundWire File Table (SWFT) signature

2025-08-25T14:44:36+00:00

The File Download (FDL) process of SoundWire Class Audio (SDCA) driver, which provides code/data which may be required by an SDCA device, utilizes SWFT to obtain that code/data. There is a single SWFT for the system, and SWFT can contain multiple files (information about the file as well as its binary contents). The SWFT has a standard ACPI Descriptor Table Header, followed by SoundWire File definitions as described in Discovery and Configuration (DisCo) Specification for SoundWire® Link: https://github.com/acpica/acpica/commit/18c96022 Signed-off-by: Maciej Strozek Reviewed-by: Charles Keepax Link: https://patch.msgid.link/20250811134505.1162661-1-mstrozek@opensource.cirrus.com Signed-off-by: Rafael J. Wysocki

ACPICA: Update copyright year

2025-05-12T13:38:43+00:00

ACPICA commit 45253be18b3f37d46cd0072aa3f8a0a21a70e0a4 Changes needed by acpisrc to update copyright year when building for release. Link: https://github.com/acpica/acpica/commit/45253be1 Signed-off-by: Saket Dumbre Signed-off-by: Rafael J. Wysocki

ACPICA: actbl2.h: ACPI 6.5: RAS2: Rename structure and field names of the RAS2 table

2025-05-12T13:38:42+00:00

ACPICA commit 2c8a38f747de9d977491a494faf0dfaf799b777b Rename the structure and field names of the RAS2 table to shorten them and avoid long lines in the ACPI RAS2 drivers. 1. struct acpi_ras2_shared_memory to struct acpi_ras2_shmem 2. In struct acpi_ras2_shared_memory: fields, - set_capabilities[16] to set_caps[16] - num_parameter_blocks to num_param_blks - set_capabilities_status to set_caps_status 3. struct acpi_ras2_patrol_scrub_parameter to struct acpi_ras2_patrol_scrub_param 4. In struct acpi_ras2_patrol_scrub_parameter: fields, - patrol_scrub_command to command - requested_address_range to req_addr_range - actual_address_range to actl_addr_range Link: https://github.com/acpica/acpica/commit/2c8a38f7 Signed-off-by: Shiju Jose Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/1942053.CQOukoFCf9@rjwysocki.net

ACPICA: actbl2.h: ERDT: Add typedef and other definitions

2025-05-12T13:38:42+00:00

ACPICA commit dddd9270531d74af523afa68515d8aae6a18bbe0 The ERDT table (and its many subtables) enumerate capabilities and methods for Intel Resource Director Technology to monitor and control L3 cache allocation and memory bandwidth by CPU cores and IO devices. Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/dddd9270 Signed-off-by: Tony Luck Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/3296755.5fSG56mABF@rjwysocki.net

ACPICA: infrastructure: Add new DMT_BUF types and shorten a long name

2025-05-12T13:38:42+00:00

ACPICA commit b8713f71b4023a0396fe61503bbbf5226e5eed1b Some ERDT subtables have 11 and 24 byte reserved fields. Add the ACPI_DMT_BUF11 and ACPI_DMT_BUF24 types to describe these reserved fields in struct acpi_dmtable_info structures. Shorten the ACPI_SUBTABLE_HEADER_16 name to ACPI_SUBTBL_HDR Link: https://github.com/acpica/acpica/commit/b8713f71 Signed-off-by: Tony Luck Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/3643286.iIbC2pHGDl@rjwysocki.net

ACPICA: MRRM: Some cleanups

2025-05-12T13:38:42+00:00

ACPICA commit 022e2e4169841f429dbda677a4780830bf4c2177 1) Added source specification to MRRM table comment in actbl2.h 2) Shorten typedef from ACPI_TABLE_MRRM_MEM_RANGE_ENTRY to struct acpi_mrrm_mem_range_entry 3) Add new typedefs to source/tools/acpisrc/astable.c 4) Fix cut and paste errors in acpi_dm_table_info_mrrm0[] definition 5) Fix indent and source code style errors in actbl2.h 6) The base/length fields in the memory range structure are system memory addresses, not "MMIO". Update the acpi_dm_table_info_mrrm0[] strings. 7) Add main/sub table comments to acpi_dm_dump_mrrm() and dt_compile_mrrm() Link: https://github.com/acpica/acpica/commit/022e2e41 Signed-off-by: Tony Luck Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/2018955.PYKUYFuaPT@rjwysocki.net

ACPICA: actbl2: Add definitions for RIMT

2025-05-12T13:38:42+00:00

ACPICA commit 73c32bc89cad64ab19c1231a202361e917e6823c RISC-V IO Mapping Table (RIMT) is a new static table defined for RISC-V to communicate IOMMU information to the OS. The specification for RIMT is available at [1]. Add structure definitions for RIMT. Link: https://github.com/riscv-non-isa/riscv-acpi-rimt [1] Link: https://github.com/acpica/acpica/commit/73c32bc8 Signed-off-by: Sunil V L Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/10665648.nUPlyArG6x@rjwysocki.net

ACPICA: actbl2.h: MRRM: Add typedef and other definitions

2025-05-12T13:38:42+00:00

ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net

ACPICA: Drop stale comment about the header file content

2025-04-28T13:02:54+00:00

ACPICA commit 48e7c4cd893270dab8d05e6d75fbf23d0fcbb267 Commit a025731aec31 ("Restructure ACPI table files") restructed the header files and moved lots of tables that are in the ACPI specification to actbl2.h(e.g.: APIC/MADT, PCCT, PPTT, ..etc). This restructure made the comment stating this header file contains tables that are not in the ACPI specification incorrect. From that commit onwards it has remained as stale. Let us get rid of it as it might be misleading. Link: https://github.com/acpica/acpica/commit/48e7c4cd Reported-by: Sahil Kaushal Signed-off-by: Sudeep Holla Signed-off-by: Rafael J. Wysocki Link: https://patch.msgid.link/6168200.lOV4Wx5bFT@rjwysocki.net

ACPICA: IORT: Update for revision E.f

2024-11-05T10:24:16+00:00

ACPICA commit c4f5c083d24df9ddd71d5782c0988408cf0fc1ab The IORT spec, Issue E.f (April 2024), adds a new CANWBS bit to the Memory Access Flag field in the Memory Access Properties table, mainly for a PCI Root Complex. This CANWBS defines the coherency of memory accesses to be not marked IOWB cacheable/shareable. Its value further implies the coherency impact from a pair of mismatched memory attributes (e.g. in a nested translation case): 0x0: Use of mismatched memory attributes for accesses made by this device may lead to a loss of coherency. 0x1: Coherency of accesses made by this device to locations in Conventional memory are ensured as follows, even if the memory attributes for the accesses presented by the device or provided by the SMMU are different from Inner and Outer Write-back cacheable, Shareable. Link: https://github.com/acpica/acpica/commit/c4f5c083 Acked-by: Rafael J. Wysocki Signed-off-by: Nicolin Chen Acked-by: Hanjun Guo Tested-by: Nicolin Chen Reviewed-by: Jerry Snitselaar Reviewed-by: Donald Dutile Signed-off-by: Jason Gunthorpe Link: https://lore.kernel.org/r/2-v4-9e99b76f3518+3a8-smmuv3_nesting_jgg@nvidia.com Signed-off-by: Will Deacon