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<title>kernel/linux.git/drivers, branch v4.9.310</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.9.310</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.9.310'/>
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<updated>2022-04-12T05:52:15+00:00</updated>
<entry>
<title>arm64: arch_timer: Add workaround for ARM erratum 1188873</title>
<updated>2022-04-12T05:52:15+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2022-04-06T16:45:19+00:00</published>
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<id>urn:sha1:501d9435c7161ccc693381e4753d4b895665370a</id>
<content type='text'>
commit 95b861a4a6d94f64d5242605569218160ebacdbe upstream.

When running on Cortex-A76, a timer access from an AArch32 EL0
task may end up with a corrupted value or register. The workaround for
this is to trap these accesses at EL1/EL2 and execute them there.

This only affects versions r0p0, r1p0 and r2p0 of the CPU.

Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>arm64: arch_timer: Add erratum handler for CPU-specific capability</title>
<updated>2022-04-12T05:52:14+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2022-04-06T16:45:18+00:00</published>
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<id>urn:sha1:ba072295630fece57622f60b73756064bbaee26e</id>
<content type='text'>
commit 0064030c6fd4ca6cfab42de037b2a89445beeead upstream.

Should we ever have a workaround for an erratum that is detected using
a capability and affecting a particular CPU, it'd be nice to have
a way to probe them directly.

Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>arm64: arch_timer: Add infrastructure for multiple erratum detection methods</title>
<updated>2022-04-12T05:52:14+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2022-04-06T16:45:17+00:00</published>
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<id>urn:sha1:f4a88eb6b1785a3489c157d76b05aa74b407979b</id>
<content type='text'>
commit 651bb2e9dca6e6dbad3fba5f6e6086a23575b8b5 upstream.

We're currently stuck with DT when it comes to handling errata, which
is pretty restrictive. In order to make things more flexible, let's
introduce an infrastructure that could support alternative discovery
methods. No change in functionality.

Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
[ morse: Removed the changes to HiSilicon erratum 161010101, which isn't
  present in v4.9 ]
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clocksource/drivers/arm_arch_timer: Introduce generic errata handling infrastructure</title>
<updated>2022-04-12T05:52:14+00:00</updated>
<author>
<name>Ding Tianhong</name>
<email>dingtianhong@huawei.com</email>
</author>
<published>2022-04-06T16:45:16+00:00</published>
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<id>urn:sha1:7a48b35f0cd3174ef1654005c6e991a2c625f0d9</id>
<content type='text'>
commit 16d10ef29f25aba923779234bb93a451b14d20e6 upstream.

Currently we have code inline in the arch timer probe path to cater for
Freescale erratum A-008585, complete with ifdeffery. This is a little
ugly, and will get worse as we try to add more errata handling.

This patch refactors the handling of Freescale erratum A-008585. Now the
erratum is described in a generic arch_timer_erratum_workaround
structure, and the probe path can iterate over these to detect errata
and enable workarounds.

This will simplify the addition and maintenance of code handling
Hisilicon erratum 161010101.

Signed-off-by: Ding Tianhong &lt;dingtianhong@huawei.com&gt;
[Mark: split patch, correct Kconfig, reword commit message]
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>clocksource/drivers/arm_arch_timer: Remove fsl-a008585 parameter</title>
<updated>2022-04-12T05:52:14+00:00</updated>
<author>
<name>Ding Tianhong</name>
<email>dingtianhong@huawei.com</email>
</author>
<published>2022-04-06T16:45:15+00:00</published>
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<id>urn:sha1:fda5a883b23742dce4bc7774f98b4c06a0a50818</id>
<content type='text'>
commit 5444ea6a7f46276876e94ecf8d44615af1ef22f7 upstream.

Having a command line option to flip the errata handling for a
particular erratum is a little bit unusual, and it's vastly superior to
pass this in the DT. By common consensus, it's best to kill off the
command line parameter.

Signed-off-by: Ding Tianhong &lt;dingtianhong@huawei.com&gt;
[Mark: split patch, reword commit message]
Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Signed-off-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>crypto: qat - disable registration of algorithms</title>
<updated>2022-03-28T06:06:06+00:00</updated>
<author>
<name>Giovanni Cabiddu</name>
<email>giovanni.cabiddu@intel.com</email>
</author>
<published>2022-03-04T17:54:47+00:00</published>
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<id>urn:sha1:64dbd9e380ab1018977653005058d97673e5c741</id>
<content type='text'>
commit 8893d27ffcaf6ec6267038a177cb87bcde4dd3de upstream.

The implementations of aead and skcipher in the QAT driver do not
support properly requests with the CRYPTO_TFM_REQ_MAY_BACKLOG flag set.
If the HW queue is full, the driver returns -EBUSY but does not enqueue
the request.
This can result in applications like dm-crypt waiting indefinitely for a
completion of a request that was never submitted to the hardware.

To avoid this problem, disable the registration of all crypto algorithms
in the QAT driver by setting the number of crypto instances to 0 at
configuration time.

Cc: stable@vger.kernel.org
Signed-off-by: Giovanni Cabiddu &lt;giovanni.cabiddu@intel.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ACPI: video: Force backlight native for Clevo NL5xRU and NL5xNU</title>
<updated>2022-03-28T06:06:06+00:00</updated>
<author>
<name>Werner Sembach</name>
<email>wse@tuxedocomputers.com</email>
</author>
<published>2022-03-15T19:02:28+00:00</published>
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<id>urn:sha1:f7735356dc3e25fad21d248acd703ee40ca37483</id>
<content type='text'>
commit c844d22fe0c0b37dc809adbdde6ceb6462c43acf upstream.

Clevo NL5xRU and NL5xNU/TUXEDO Aura 15 Gen1 and Gen2 have both a working
native and video interface. However the default detection mechanism first
registers the video interface before unregistering it again and switching
to the native interface during boot. This results in a dangling SBIOS
request for backlight change for some reason, causing the backlight to
switch to ~2% once per boot on the first power cord connect or disconnect
event. Setting the native interface explicitly circumvents this buggy
behaviour by avoiding the unregistering process.

Signed-off-by: Werner Sembach &lt;wse@tuxedocomputers.com&gt;
Cc: All applicable &lt;stable@vger.kernel.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ACPI: battery: Add device HID and quirk for Microsoft Surface Go 3</title>
<updated>2022-03-28T06:06:06+00:00</updated>
<author>
<name>Maximilian Luz</name>
<email>luzmaximilian@gmail.com</email>
</author>
<published>2022-02-13T15:49:20+00:00</published>
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<id>urn:sha1:2ed6e1a08b04224a7dc6e5d089b4dc1ccaf6edab</id>
<content type='text'>
commit 7dacee0b9efc8bd061f097b1a8d4daa6591af0c6 upstream.

For some reason, the Microsoft Surface Go 3 uses the standard ACPI
interface for battery information, but does not use the standard PNP0C0A
HID. Instead it uses MSHW0146 as identifier. Add that ID to the driver
as this seems to work well.

Additionally, the power state is not updated immediately after the AC
has been (un-)plugged, so add the respective quirk for that.

Signed-off-by: Maximilian Luz &lt;luzmaximilian@gmail.com&gt;
Cc: All applicable &lt;stable@vger.kernel.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>staging: fbtft: fb_st7789v: reset display before initialization</title>
<updated>2022-03-28T06:06:05+00:00</updated>
<author>
<name>Oliver Graute</name>
<email>oliver.graute@kococonnector.com</email>
</author>
<published>2022-02-10T08:53:22+00:00</published>
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<id>urn:sha1:7133e8468790b20cf5598de6b08174509aef3819</id>
<content type='text'>
commit b6821b0d9b56386d2bf14806f90ec401468c799f upstream.

In rare cases the display is flipped or mirrored. This was observed more
often in a low temperature environment. A clean reset on init_display()
should help to get registers in a sane state.

Fixes: ef8f317795da (staging: fbtft: use init function instead of init sequence)
Cc: stable@vger.kernel.org
Signed-off-by: Oliver Graute &lt;oliver.graute@kococonnector.com&gt;
Link: https://lore.kernel.org/r/20220210085322.15676-1-oliver.graute@kococonnector.com
[sudip: adjust context]
Signed-off-by: Sudip Mukherjee &lt;sudipm.mukherjee@gmail.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>nfc: st21nfca: Fix potential buffer overflows in EVT_TRANSACTION</title>
<updated>2022-03-28T06:06:05+00:00</updated>
<author>
<name>Jordy Zomer</name>
<email>jordy@pwning.systems</email>
</author>
<published>2022-01-11T16:44:51+00:00</published>
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<id>urn:sha1:c1184fa07428fb81371d5863e09795f0d06d35cf</id>
<content type='text'>
commit 4fbcc1a4cb20fe26ad0225679c536c80f1648221 upstream.

It appears that there are some buffer overflows in EVT_TRANSACTION.
This happens because the length parameters that are passed to memcpy
come directly from skb-&gt;data and are not guarded in any way.

Signed-off-by: Jordy Zomer &lt;jordy@pwning.systems&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Denis Efremov &lt;denis.e.efremov@oracle.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
