<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/usb/dwc2/core.c, branch v5.10.264</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.264</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v5.10.264'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2026-03-04T12:20:21+00:00</updated>
<entry>
<title>usb: dwc2: fix resume failure if dr_mode is host</title>
<updated>2026-03-04T12:20:21+00:00</updated>
<author>
<name>Jisheng Zhang</name>
<email>jszhang@kernel.org</email>
</author>
<published>2026-01-29T02:15:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3680ca2858dcb1713a5a510b1436980e8eb7bd22'/>
<id>urn:sha1:3680ca2858dcb1713a5a510b1436980e8eb7bd22</id>
<content type='text'>
[ Upstream commit a52e4f2dff413b58c7200e89bb6540bd995e1269 ]

commit 13b1f8e25bfd1 ("usb: dwc2: Force mode optimizations") removed the
dwc2_force_mode(hsotg, true) in dwc2_force_dr_mode() if dr_mode is host.

But this brings a bug: the controller fails to resume back as host,
further debugging shows that the controller is resumed as peripheral.
The reason is dwc2_force_dr_mode() missed the host mode forcing, and
when resuming from s2ram, GINTSTS is 0 by default, dwc2_is_device_mode
in dwc2_resume() misreads this as the controller is in peripheral mode.

Fix the resume failure by adding back the dwc2_force_mode(hsotg, true).

Then an obvious question is: why this bug hasn't been observed and fixed
for about six years? There are two resons: most dwc2 platforms set the
dr_mode as otg; Some platforms don't have suspend &amp; resume support yet.

Fixes: 13b1f8e25bfd1 ("usb: dwc2: Force mode optimizations")
Cc: stable &lt;stable@kernel.org&gt;
Signed-off-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Link: https://patch.msgid.link/20260129021534.10411-1-jszhang@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Don't reset the core after setting turnaround time</title>
<updated>2021-07-14T14:56:43+00:00</updated>
<author>
<name>Clément Lassieur</name>
<email>clement@lassieur.org</email>
</author>
<published>2021-06-03T15:59:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c7188d19989b2349943e92d3953be50f1032189d'/>
<id>urn:sha1:c7188d19989b2349943e92d3953be50f1032189d</id>
<content type='text'>
[ Upstream commit aafe93516b8567ab5864e1f4cd3eeabc54fb0e5a ]

Every time the hub signals a reset while we (device) are hsotg-&gt;connected,
dwc2_hsotg_core_init_disconnected() is called, which in turn calls
dwc2_hs_phy_init().

GUSBCFG.USBTrdTim is cleared upon Core Soft Reset, so if
hsotg-&gt;params.phy_utmi_width is 8-bit, the value of GUSBCFG.USBTrdTim (the
default one: 0x5, corresponding to 16-bit) is always different from
hsotg-&gt;params.phy_utmi_width, thus dwc2_core_reset() is called every
time (usbcfg != usbcfg_old), which causes 2 issues:

1) The call to dwc2_core_reset() does another reset 300us after the initial
Chirp K of the first reset (which should last at least Tuch = 1ms), and
messes up the High-speed Detection Handshake: both hub and device drive
current into the D+ and D- lines at the same time.

2) GUSBCFG.USBTrdTim is cleared by the second reset, so its value is always
the default one (0x5).

Setting GUSBCFG.USBTrdTim after the potential call to dwc2_core_reset()
fixes both issues.  It is now set even when select_phy is false because the
cost of the Core Soft Reset is removed.

Fixes: 1e868545f2bb ("usb: dwc2: gadget: Move gadget phy init into core phy init")
Signed-off-by: Clément Lassieur &lt;clement@lassieur.org&gt;
Link: https://lore.kernel.org/r/20210603155921.940651-1-clement@lassieur.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Update Core Reset programming flow.</title>
<updated>2020-05-25T08:09:44+00:00</updated>
<author>
<name>Minas Harutyunyan</name>
<email>Minas.Harutyunyan@synopsys.com</email>
</author>
<published>2020-05-21T06:05:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=65dc2e725286106f99c6f6b78e3d9c52c15f3a9c'/>
<id>urn:sha1:65dc2e725286106f99c6f6b78e3d9c52c15f3a9c</id>
<content type='text'>
Starting from core version 4.20a Core Reset flow is changed.
Introduced new bit in GRSTCTL register - GRSTCTL_CSFTRST_DONE.
Core Reset new programming flow steps are follow:
1. Set GRSTCTL_CSFTRST bit.
2. Wait for bit GRSTCTL_CSFTRST_DONE is set.
3. Clear GRSTCTL_CSFTRST and GRSTCTL_CSFTRST_DONE bits.

Check core version functionality separated from dwc2_get_hwparams() to
new dwc2_check_core_version() function because Core Reset flow depend
on SNPSID.

Signed-off-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;balbi@kernel.org&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: use a longer core rest timeout in dwc2_core_reset()</title>
<updated>2019-10-22T07:42:08+00:00</updated>
<author>
<name>Mathias Kresin</name>
<email>dev@kresin.me</email>
</author>
<published>2019-07-07T14:22:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6689f0f4bb14e50917ba42eb9b41c25e0184970c'/>
<id>urn:sha1:6689f0f4bb14e50917ba42eb9b41c25e0184970c</id>
<content type='text'>
Testing on different generations of Lantiq MIPS SoC based boards, showed
that it takes up to 1500 us until the core reset bit is cleared.

The driver from the vendor SDK (ifxhcd) uses a 1 second timeout. Use the
same timeout to fix wrong hang detections and make the driver work for
Lantiq MIPS SoCs.

At least till kernel 4.14 the hanging reset only caused a warning but
the driver was probed successful. With kernel 4.19 errors out with
EBUSY.

Cc: linux-stable &lt;stable@vger.kernel.org&gt; # 4.19+
Signed-off-by: Mathias Kresin &lt;dev@kresin.me&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: use a longer AHB idle timeout in dwc2_core_reset()</title>
<updated>2019-07-03T07:59:22+00:00</updated>
<author>
<name>Martin Blumenstingl</name>
<email>martin.blumenstingl@googlemail.com</email>
</author>
<published>2019-06-20T17:50:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=dfc4fdebc5d62ac4e2fe5428e59b273675515fb2'/>
<id>urn:sha1:dfc4fdebc5d62ac4e2fe5428e59b273675515fb2</id>
<content type='text'>
Use a 10000us AHB idle timeout in dwc2_core_reset() and make it
consistent with the other "wait for AHB master IDLE state" ocurrences.

This fixes a problem for me where dwc2 would not want to initialize when
updating to 4.19 on a MIPS Lantiq VRX200 SoC. dwc2 worked fine with
4.14.
Testing on my board shows that it takes 180us until AHB master IDLE
state is signalled. The very old vendor driver for this SoC (ifxhcd)
used a 1 second timeout.
Use the same timeout that is used everywhere when polling for
GRSTCTL_AHBIDLE instead of using a timeout that "works for one board"
(180us in my case) to have consistent behavior across the dwc2 driver.

Cc: linux-stable &lt;stable@vger.kernel.org&gt; # 4.19+
Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: gadget: Move gadget phy init into core phy init</title>
<updated>2019-05-03T06:13:48+00:00</updated>
<author>
<name>Jules Maselbas</name>
<email>jmaselbas@kalray.eu</email>
</author>
<published>2019-04-05T13:35:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=1e868545f2bb06f7dd4a1c97c5b9ed2615929cf0'/>
<id>urn:sha1:1e868545f2bb06f7dd4a1c97c5b9ed2615929cf0</id>
<content type='text'>
Most of the phy initialization is shared between host and gadget,
this adds the turnaround configuration only used by gadgets to
the global phy init.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Move phy init into core</title>
<updated>2019-05-03T06:13:48+00:00</updated>
<author>
<name>Jules Maselbas</name>
<email>jmaselbas@kalray.eu</email>
</author>
<published>2019-04-05T13:35:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=059d8d528718407435216251eff8b49935b92b34'/>
<id>urn:sha1:059d8d528718407435216251eff8b49935b92b34</id>
<content type='text'>
As the phy initialization is almost the same in host and gadget
mode. This only move the phy initialization functions into core.c
for now, the goal is to share theses functions between the two modes.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Jules Maselbas &lt;jmaselbas@kalray.eu&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Modify dwc2_readl/writel functions prototype</title>
<updated>2018-07-30T07:39:16+00:00</updated>
<author>
<name>Gevorg Sahakyan</name>
<email>Gevorg.Sahakyan@synopsys.com</email>
</author>
<published>2018-07-26T14:00:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f25c42b8d604fbca6d8d3eff2365a73bbef076d3'/>
<id>urn:sha1:f25c42b8d604fbca6d8d3eff2365a73bbef076d3</id>
<content type='text'>
Added hsotg argument to dwc2_readl/writel function prototype,
and also instead of address pass offset of register.
hsotg will contain flag field for endianness.

Also customized dwc2_set_bit and dwc2_clear_bit function for
dwc2_readl/writel functions.

Signed-off-by: Gevorg Sahakyan &lt;sahakyan@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Fix kernel doc's warnings.</title>
<updated>2018-05-21T07:02:13+00:00</updated>
<author>
<name>Grigor Tovmasyan</name>
<email>Grigor.Tovmasyan@synopsys.com</email>
</author>
<published>2018-05-16T08:04:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6fb914d788133fd2298af87c50aefe1863cf1445'/>
<id>urn:sha1:6fb914d788133fd2298af87c50aefe1863cf1445</id>
<content type='text'>
Added descriptions for all not described parameters.
Fix all kernel doc's warnings.

Acked-by: Minas Harutyunyan &lt;hminas@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>usb: dwc2: Make dwc2_force_mode() static</title>
<updated>2018-03-13T08:47:58+00:00</updated>
<author>
<name>Grigor Tovmasyan</name>
<email>Grigor.Tovmasyan@synopsys.com</email>
</author>
<published>2018-01-19T10:43:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=365b7673c34fed58b0a04ee4a7a51102c65ccd2e'/>
<id>urn:sha1:365b7673c34fed58b0a04ee4a7a51102c65ccd2e</id>
<content type='text'>
Declared dwc2_force_mode() function as static, because it was used
only in core.c file, for fixing sparse error.

Acked-by: John Youn &lt;johnyoun@synopsys.com&gt;
Signed-off-by: Grigor Tovmasyan &lt;tovmasya@synopsys.com&gt;
Signed-off-by: Felipe Balbi &lt;felipe.balbi@linux.intel.com&gt;
</content>
</entry>
</feed>
