kernel/linux.git/drivers/tty/serial/8250/Makefile, branch v4.9.331

serial: 8250_lpss: split LPSS driver to separate module

2016-08-31T14:13:30+00:00

The SoCs, such as Intel Braswell, have DesignWare UART IP. Split out the support of such chips to a separate module which also will be used for Intel Quark later. The rationale to have the separate driver to be existing: - Do not contaminate 8250_pci.c anymore with LPSS related quirks - All of them are using same DMA engine and they are Designware IP which means that in the future we might share the code between 8250_dw.c and 8250_lpss.c - It reduces the kernel memory footprint on non-X86 machines where 8250_pci.c is in use Besides the split the driver also has been refactored, in particular a) the DMA and port setup are separate functions, b) the two new structures lpss8250 and lpss8250_board are introduced to keep necessary data instead of pciserial_board, c) DMA parameters are passed to the DMA setup via mentioned custom structure. Most of the changes are done due to the future support of UART DMA on Intel Quark. The Intel Quark UART DMA support is based on bits taking from BSP code published by Intel earlier. The driver does not use any specific power management. PCI core takes care of the default behaviour during suspend and resume. Signed-off-by: Andy Shevchenko Tested-by: Bryan O'Donoghue Signed-off-by: Greg Kroah-Hartman

serial: 8250: Integrate Fintek into 8250_base

2016-04-30T16:26:55+00:00

The 8250_fintek driver advertises as the PNP0501 driver; however this conflicts with the standard 16550A uart PNP0501. The conflict causes the 8250_fintek driver to load with _every_ PNP0501, but never probe, and causing the entire 8250 driver stack to unload if the 8250_fintek driver is unloaded (modprobe doesn't know that 8250_pnp rather than 8250_fintek claimed the resource). This patch merges the Fintek driver into 8250_base. On autoconfig_16550 the device is probed to verify if it is a FINTEK device or not. This custom probing can be disabled completely via configuration. When a Fintek device is not probed it will behave as a standard 16550A device, with no RS485 capabilities. Reported-by: Peter Hurley Signed-off-by: Ricardo Ribalda Delgado Reviewed-by: Peter Hurley Signed-off-by: Greg Kroah-Hartman

tty: serial: 8250: add MOXA Smartio MUE boards support

2016-03-08T00:11:14+00:00

Add support for : - CP-102E: 2 ports RS232 PCIE card - CP-102EL: 2 ports RS232 PCIE card - CP-132EL: 2 ports RS422/485 PCIE card - CP-114EL: 4 ports RS232/422/485 PCIE card - CP-104EL-A: 4 ports RS232 PCIE card - CP-168EL-A: 8 ports RS232 PCIE card - CP-118EL-A: 8 ports RS232/422/485 PCIE card - CP-118E-A: 8 ports RS422/485 PCIE card - CP-138E-A: 8 ports RS422/485 PCIE card - CP-134EL-A: 4 ports RS422/485 PCIE card - CP-116E-A (A): 8 ports RS232/422/485 PCIE card - CP-116E-A (B): 8 ports RS232/422/485 PCIE card This patch is based on information extracted from vendor mxupcie driver available on MOXA website. I was able to test it on a CP-168EL-A on PC. Signed-off-by: Mathieu OTHACEHE Reviewed-by: Andy Shevchenko Signed-off-by: Greg Kroah-Hartman

serial: bcm2835: add driver for bcm2835-aux-uart

2016-02-07T07:13:30+00:00

The bcm2835 SOC contains an auxiliary uart, which is very close to the ns16550 with some differences. The big difference is that the uart HW is not using an internal divider of 16 but 8, which results in an effictive baud-rate being twice the requested baud-rate. This driver handles this device correctly and handles the difference in the HW divider by scaling up the clock by a factor of 2. The approach to write a separate (wrapper) driver instead of using a multiplying clock and "ns16550" as compatibility in the device-tree has been recommended by Stephen Warren. Signed-off-by: Martin Sperl Acked-by: Eric Anholt Signed-off-by: Greg Kroah-Hartman

serial: 8250: of: Fix the driver and actually compile the 8250_of

2016-01-07T22:45:53+00:00

The 8250_of never compiled since in the Kconfig we have SERIAL_OF_PLATFORM but in the makefile we expect to have SERIAL_8250_OF... When the 8250_of.c is actually compiled we will have two errors: missing linux/nwpserial.h and 8250/8250.h. Fix those as well at the same time when enable the compilation of the driver. Signed-off-by: Peter Ujfalusi Fixes: afd7f88f1577 ("serial: 8250: move of_serial code to 8250 directory") Reported-by: Guenter Roeck CC: Arnd Bergmann Acked-by: Arnd Bergmann Acked-by: Jon Hunter Tested-by: Jon Hunter Signed-off-by: Greg Kroah-Hartman

serial: 8250: move of_serial code to 8250 directory

2015-12-14T03:59:48+00:00

As the of-serial driver is now 8250 specific, we can move the file to a more appropriate place in teh 8250 subdirectory and adapt the Kconfig help text and file name. I'm leaving the CONFIG_SERIAL_OF_PLATFORM symbol unchanged to avoid breaking user configuration files unnecessarily. Signed-off-by: Arnd Bergmann Signed-off-by: Greg Kroah-Hartman

serial: 8250_pci: Intel MID UART support to its own driver

2015-10-18T04:18:38+00:00

Intel MID UART quirks require already quite a bit of code in 8250_pci.c. On new Intel platforms where it is used, the integrated DMA engine no longer has its own PCI device, but is instead configured from the UART's MMIO. That means we will have to add even more code for handling just MID UARTs. Instead of adding that to 8250_pci.c, splitting the support of Intel MID UART into its own driver. Handling of the integrated DMA engine becomes much simpler this way. Own driver will also remove the need for things like specific set_termios hooks for every board using this UART, and simplify the handling of it in general. Signed-off-by: Heikki Krogerus Acked-by: Andy Shevchenko Signed-off-by: Greg Kroah-Hartman

serial: 8250: Split base port operations from universal driver

2015-07-24T00:43:01+00:00

Refactor base port operations into new file; 8250_port.c. Legacy irq handling, RSA port support, port storage for universal driver, driver definition, module parameters and linkage remain in 8250_core.c The source file split and resulting modules is diagrammed below: 8250_core.c ====> 8250_core.c __ \ \ \ +-- 8250.ko (alias 8250_core) \ 8250_pnp.c __/ (universal driver) \ => 8250_port.c __ \ +-- 8250_base.ko 8250_dma.c __/ (port operations) Signed-off-by: Peter Hurley Signed-off-by: Greg Kroah-Hartman

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2015-06-27T19:44:34+00:00

Pull MIPS updates from Ralf Baechle: - Improvements to the tlb_dump code - KVM fixes - Add support for appended DTB - Minor improvements to the R12000 support - Minor improvements to the R12000 support - Various platform improvments for BCM47xx - The usual pile of minor cleanups - A number of BPF fixes and improvments - Some improvments to the support for R3000 and DECstations - Some improvments to the ATH79 platform support - A major patchset for the JZ4740 SOC adding support for the CI20 platform - Add support for the Pistachio SOC - Minor BMIPS/BCM63xx platform support improvments. - Avoid "SYNC 0" as memory barrier when unlocking spinlocks - Add support for the XWR-1750 board. - Paul's __cpuinit/__cpuinitdata cleanups. - New Malta CPU board support large memory so enable ZONE_DMA32. * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (131 commits) MIPS: spinlock: Adjust arch_spin_lock back-off time MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA MIPS: BCM47xx: Simplify handling SPROM revisions MIPS: Cobalt Don't use module_init in non-modular MTD registration. MIPS: BCM47xx: Move NVRAM driver to the drivers/firmware/ MIPS: use for_each_sg() MIPS: BCM47xx: Don't select BCMA_HOST_PCI MIPS: BCM47xx: Add helper variable for storing NVRAM length MIPS: IRQ/IP27: Move IRQ allocation API to platform code. MIPS: Replace smp_mb with release barrier function in unlocks. MIPS: i8259: DT support MIPS: Malta: Basic DT plumbing MIPS: include errno.h for ENODEV in mips-cm.h MIPS: Define GCR_GIC_STATUS register fields MIPS: BPF: Introduce BPF ASM helpers MIPS: BPF: Use BPF register names to describe the ABI MIPS: BPF: Move register definition to the BPF header MIPS: net: BPF: Replace RSIZE with SZREG MIPS: BPF: Free up some callee-saved registers MIPS: Xtalk: Update xwidget.h with known Xtalk device numbers ...

serial: 8250_ingenic: support for Ingenic SoC UARTs

2015-06-21T19:53:24+00:00

Introduce a driver suitable for use with the UARTs present in Ingenic SoCs such as the JZ4740 & JZ4780. These are described as being ns16550 compatible but aren't quite - they require the setting of an extra bit in the FCR register to enable the UART module. The serial_out implementation is the same as that in arch/mips/jz4740/serial.c - which will shortly be removed. Signed-off-by: Paul Burton Cc: Greg Kroah-Hartman Cc: Jiri Slaby Cc: Lars-Peter Clausen Cc: linux-serial@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Sebastian Andrzej Siewior Cc: Peter Hurley Cc: Alan Cox Cc: linux-kernel@vger.kernel.org Cc: Matthias Brugger Cc: Ricardo Ribalda Delgado Cc: Tony Lindgren Cc: John Crispin Patchwork: https://patchwork.linux-mips.org/patch/10159/ Signed-off-by: Ralf Baechle