<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/thunderbolt/tb.c, branch v6.6.131</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.131</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.131'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2025-11-24T09:29:27+00:00</updated>
<entry>
<title>thunderbolt: Use is_pciehp instead of is_hotplug_bridge</title>
<updated>2025-11-24T09:29:27+00:00</updated>
<author>
<name>Lukas Wunner</name>
<email>lukas@wunner.de</email>
</author>
<published>2025-08-12T13:42:29+00:00</published>
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<id>urn:sha1:74e9ec803b6d1674b3f2b7c6d1862949e12bc410</id>
<content type='text'>
[ Upstream commit 5d03847175e81e86d4865456c15638faaf7c0634 ]

The thunderbolt driver sets up device link dependencies from hotplug ports
to the Host Router (aka Native Host Interface, NHI).  When resuming from
system sleep, this allows the Host Router to re-establish tunnels to
attached Thunderbolt devices before the hotplug ports resume.

To identify the hotplug ports, the driver utilizes the is_hotplug_bridge
flag which also encompasses ACPI slots handled by the ACPI hotplug driver.

Thunderbolt hotplug ports are always Hot-Plug Capable PCIe ports, so it is
more apt to identify them with the is_pciehp flag.

Similarly, hotplug ports on older Thunderbolt controllers have broken MSI
support and are quirked to use legacy INTx interrupts instead.  The quirk
identifies them with is_hotplug_bridge, even though all affected ports are
also matched by is_pciehp.  So use is_pciehp here as well.

Signed-off-by: Lukas Wunner &lt;lukas@wunner.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Scan retimers after device router has been enumerated</title>
<updated>2025-05-02T05:50:55+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2025-03-04T08:53:21+00:00</published>
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<id>urn:sha1:d5ada7bf3dc8b936b222432e590376649e8ae825</id>
<content type='text'>
[ Upstream commit 75749d2c1d8cef439f8b69fa1f4f36d0fc3193e6 ]

Thomas reported connection issues on AMD system with Pluggable UD-4VPD
dock. After some experiments it looks like the device has some sort of
internal timeout that triggers reconnect. This is completely against the
USB4 spec, as there is no requirement for the host to enumerate the
device right away or even at all.

In Linux case the delay is caused by scanning of retimers on the link so
we can work this around by doing the scanning after the device router
has been enumerated.

Reported-by: Thomas Lynema &lt;lyz27@yahoo.com&gt;
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=219748
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Improve redrive mode handling</title>
<updated>2024-12-27T12:58:51+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2024-11-15T09:54:40+00:00</published>
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<id>urn:sha1:d1b96495fa2afa884917f8d1cd3f89cc929ff649</id>
<content type='text'>
commit 24740385cb0d6d22ab7fa7adf36546d5b3cdcf73 upstream.

When USB-C monitor is connected directly to Intel Barlow Ridge host, it
goes into "redrive" mode that basically routes the DisplayPort signals
directly from the GPU to the USB-C monitor without any tunneling needed.
However, the host router must be powered on for this to work. Aaron
reported that there are a couple of cases where this will not work with
the current code:

  - Booting with USB-C monitor plugged in.
  - Plugging in USB-C monitor when the host router is in sleep state
    (runtime suspended).
  - Plugging in USB-C device while the system is in system sleep state.

In all these cases once the host router is runtime suspended the picture
on the connected USB-C display disappears too. This is certainly not
what the user expected.

For this reason improve the redrive mode handling to keep the host
router from runtime suspending when detect that any of the above cases
is happening.

Fixes: a75e0684efe5 ("thunderbolt: Keep the domain powered when USB4 port is in redrive mode")
Reported-by: Aaron Rainbolt &lt;arainbolt@kfocus.org&gt;
Closes: https://lore.kernel.org/linux-usb/20241009220118.70bfedd0@kf-ir16/
Cc: stable@vger.kernel.org
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Honor TMU requirements in the domain when setting TMU mode</title>
<updated>2024-11-08T15:28:24+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-10T14:29:42+00:00</published>
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<id>urn:sha1:8cd25f1fce6b8f9e20401617a4a6c19dbf956f5b</id>
<content type='text'>
commit 3cea8af2d1a9ae5869b47c3dabe3b20f331f3bbd upstream.

Currently, when configuring TMU (Time Management Unit) mode of a given
router, we take into account only its own TMU requirements ignoring
other routers in the domain. This is problematic if the router we are
configuring has lower TMU requirements than what is already configured
in the domain.

In the scenario below, we have a host router with two USB4 ports: A and
B. Port A connected to device router #1 (which supports CL states) and
existing DisplayPort tunnel, thus, the TMU mode is HiFi uni-directional.

1. Initial topology

          [Host]
         A/
         /
 [Device #1]
   /
Monitor

2. Plug in device #2 (that supports CL states) to downstream port B of
   the host router

         [Host]
        A/    B\
        /       \
 [Device #1]    [Device #2]
   /
Monitor

The TMU mode on port B and port A will be configured to LowRes which is
not what we want and will cause monitor to start flickering.

To address this we first scan the domain and search for any router
configured to HiFi uni-directional mode, and if found, configure TMU
mode of the given router to HiFi uni-directional as well.

Cc: stable@vger.kernel.org
Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Improve DisplayPort tunnel setup process to be more robust</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4d0261cea469855fa3a33df8dd1cb29b7e6ee05a'/>
<id>urn:sha1:4d0261cea469855fa3a33df8dd1cb29b7e6ee05a</id>
<content type='text'>
[ Upstream commit b4734507ac55cc7ea1380e20e83f60fcd7031955 ]

After DisplayPort tunnel setup, we add verification that the DPRX
capabilities read process completed. Otherwise, we bail out, teardown
the tunnel, and try setup another DisplayPort tunnel using next
available DP IN adapter. We do so till all DP IN adapters tried. This
way, we avoid allocating DP IN adapter and (bandwidth for it) for
unusable tunnel.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Configure asymmetric link if needed and bandwidth allows</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=aed38a3eaf652230e8622ec9317998540276f61d'/>
<id>urn:sha1:aed38a3eaf652230e8622ec9317998540276f61d</id>
<content type='text'>
[ Upstream commit 3e36528c1127b20492ffaea53930bcc3df46a718 ]

USB4 v2 spec defines a Gen 4 link that can operate as an asymmetric
120/40G. When the link is asymmetric, the USB4 port on one side of the
link operates with three TX lanes and one RX lane, while the USB4 port
on the opposite side of the link operates with three RX lanes and one TX
lane. Using asymmetric link we can get much more bandwidth from one
direction and that allows us to support the new Ultra High Bit Rate
DisplayPort modes (that consume up to 77.37 Gb/s).

Add the basic logic for changing Gen 4 links to asymmetric and back
following the below rules:

  1) The default threshold is 45 Gb/s (tunable by asym_threshold)
  2) When DisplayPort tunnel is established, or when there is bandwidth
     request through bandwidth allocation mode, the links can be
     transitioned to asymmetric or symmetric (depending on the
     required bandwidth).
  3) Only DisplayPort bandwidth on a link, is taken into account when
     deciding whether a link is transitioned to asymmetric or symmetric
  4) If bandwidth on a link is &gt;= asym_threshold transition the link to
     asymmetric
  5) If bandwidth on a link &lt; asym_threshold transition the link to
     symmetric (unless the bandwidth request is above currently
     allocated on a tunnel).
  6) If a USB4 v2 device router with symmetric link is connected,
     transition all the links above it to symmetric if the bandwidth
     allows.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Co-developed-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add support for asymmetric link</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9b6933e9bddc04655a894c74cd5c62202a5e3d89'/>
<id>urn:sha1:9b6933e9bddc04655a894c74cd5c62202a5e3d89</id>
<content type='text'>
[ Upstream commit 81af2952e60603d12415e1a6fd200f8073a2ad8b ]

USB4 v2 spec defines a Gen 4 link that can operate as an aggregated
symmetric (80/80G) or asymmetric (120/40G). When the link is asymmetric,
the USB4 port on one side of the link operates with three TX lanes and
one RX lane, while the USB4 port on the opposite side of the link
operates with three RX lanes and one TX lane.

Add support for the asymmetric link and provide functions that can be
used to transition the link to asymmetric and back.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Co-developed-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Introduce tb_switch_depth()</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8f053095e13eb45b8e8fd1a244353e9845d303f4'/>
<id>urn:sha1:8f053095e13eb45b8e8fd1a244353e9845d303f4</id>
<content type='text'>
[ Upstream commit c4ff14436952c3d0dd05769d76cf48e73a253b48 ]

This is useful helper to find out the depth of a connected router.
Convert the existing users to call this helper instead of open-coding.

No functional changes.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Introduce tb_port_path_direction_downstream()</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=18dcdadc994125ccd42288184a52b1867315e7fd'/>
<id>urn:sha1:18dcdadc994125ccd42288184a52b1867315e7fd</id>
<content type='text'>
[ Upstream commit 2bfeca73e94567c1a117ca45d2e8a25d63e5bd2c ]

Introduce tb_port_path_direction_downstream() to check if path from
source adapter to destination adapter is directed towards downstream.
Convert existing users to call this helper instead of open-coding.

No functional changes.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Change bandwidth reservations to comply USB4 v2</title>
<updated>2024-10-04T14:30:01+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@linux.intel.com</email>
</author>
<published>2024-10-01T17:31:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=5ac89bb0062e960e0be3d0d7cbf56dca3fd48bab'/>
<id>urn:sha1:5ac89bb0062e960e0be3d0d7cbf56dca3fd48bab</id>
<content type='text'>
[ Upstream commit 582e70b0d3a412d15389a3c9c07a44791b311715 ]

USB4 v2 Connection Manager guide (section 6.1.2.3) suggests to reserve
bandwidth in a sligthly different manner. It suggests to keep minimum of
1500 Mb/s for each path that carry a bulk traffic. Here we change the
bandwidth reservations to comply to the above for USB 3.x and PCIe
protocols over Gen 4 link, taking weights into account (that's 1500 Mb/s
for PCIe and 3000 Mb/s for USB 3.x).

For Gen 3 and below we use the existing reservation.

Signed-off-by: Gil Fine &lt;gil.fine@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qin Wan &lt;qin.wan@hp.com&gt;
Signed-off-by: Alexandru Gagniuc &lt;alexandru.gagniuc@hp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
