<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/thunderbolt/lc.c, branch v6.12.80</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.12.80'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-01-22T11:21:06+00:00</updated>
<entry>
<title>thunderbolt: Introduce tb_port_reset()</title>
<updated>2024-01-22T11:21:06+00:00</updated>
<author>
<name>Sanath S</name>
<email>Sanath.S@amd.com</email>
</author>
<published>2024-01-13T09:39:57+00:00</published>
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<id>urn:sha1:01da6b99d49f60b1edead44e33569b1a2e9f49b7</id>
<content type='text'>
Introduce a function that issues Downstream Port Reset to a USB4 port.
This supports Thunderbolt 2, 3 and USB4 routers.

Signed-off-by: Sanath S &lt;Sanath.S@amd.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add internal xHCI connect flows for Thunderbolt 3 devices</title>
<updated>2022-02-02T10:56:51+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2022-01-07T11:00:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=30a4eca69b76c0ed5a2f34dd2a3e195c9bf6bed1'/>
<id>urn:sha1:30a4eca69b76c0ed5a2f34dd2a3e195c9bf6bed1</id>
<content type='text'>
Both Alpine Ridge and Titan Ridge require special flows in order to
activate the internal xHCI controller when there is USB device connected
to the downstream type-C port. This implements the missing flows for
both.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Enable CL0s for Intel Titan Ridge</title>
<updated>2021-12-28T07:43:56+00:00</updated>
<author>
<name>Gil Fine</name>
<email>gil.fine@intel.com</email>
</author>
<published>2021-12-17T01:16:43+00:00</published>
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<id>urn:sha1:43f977bc60b1cfd3c1d220a9a0a06493fbf3985d</id>
<content type='text'>
Low power link states (called collectively CLx) are used to reduce
transmitter and receiver power when a high-speed lane is idle. The
simplest one being called CL0s. Follow what we already do for USB4
device routers and enable CL0s for Intel Titan Ridge device router too.
This allows better thermal management.

Signed-off-by: Gil Fine &lt;gil.fine@intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add wake from DisplayPort</title>
<updated>2021-05-31T11:39:52+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2021-01-14T14:44:17+00:00</published>
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<id>urn:sha1:6026b703e8f61bf9c395bb286fa3b46956ce0496</id>
<content type='text'>
Latest USB4 spec added a new wake bit for DisplayPort so add this to the
driver when runtime suspending. This way wake up the domain when a new
monitor is plugged in to any of the device routers.

Also do the same for pre-USB4 devices through the link controller
registers as documented in chapter 13 of the USB4 spec.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Start lane initialization after sleep</title>
<updated>2021-01-11T14:15:42+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2020-11-26T09:52:43+00:00</published>
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<id>urn:sha1:fdb0887c5a87c3a98958d3c5c90f871aa6d1a562</id>
<content type='text'>
USB4 spec says that for TBT3 compatible device routers the connection
manager needs to set SLI (Start Lane Initialization) to get the lanes
that were not connected back to functional state after sleep. Same needs
to be done if the link was XDomain.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Yehezkel Bernat &lt;YehezkelShB@gmail.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Enable wakes from system suspend</title>
<updated>2020-09-03T09:06:42+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2019-12-06T16:36:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b2911a593a705e54adde6d06d4657c1ff2f16583'/>
<id>urn:sha1:b2911a593a705e54adde6d06d4657c1ff2f16583</id>
<content type='text'>
In order for the router and the whole domain to wake up from system
suspend states we need to enable wakes for the connected routers. For
device routers we enable wakes from PCIe and USB 3.x. This allows
devices such as keyboards connected to USB 3.x hub that is tunneled to
wake the system up as expected. For all routers we enabled wake on USB4
for each connected ports. This is used to propagate the wake from router
to another.

Do the same for legacy routers through link controller vendor specific
registers as documented in USB4 spec chapter 13.

While there correct kernel-doc of usb4_switch_set_sleep() -- it does not
enable wakes instead there is a separate function (usb4_switch_set_wake())
that does.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Configure port for XDomain</title>
<updated>2020-09-03T09:06:41+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2020-04-09T11:23:32+00:00</published>
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<id>urn:sha1:284652a4a49917e121277a6cacbefed9f65b94ca</id>
<content type='text'>
When the port is connected to another host it should be marked as such
in the USB4 port capability. This information is used by the router
during sleep and wakeup.

Also do the same for legacy switches via link controller vendor specific
registers.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Set port configured for both ends of the link</title>
<updated>2020-09-03T09:06:41+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2020-04-02T09:42:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e28178bf566cf7281b513856aa71a8d41aa81154'/>
<id>urn:sha1:e28178bf566cf7281b513856aa71a8d41aa81154</id>
<content type='text'>
Both ends of the link needs to have this set. Otherwise the link is not
re-established properly after sleep. Now since it is possible to have
mixed USB4 and Thunderbolt 1, 2 and 3 devices we need to split the link
configuration functionality to happen per port so we can pick the
correct implementation.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Configure link after lane bonding is enabled</title>
<updated>2020-09-03T09:06:41+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2020-04-02T11:50:52+00:00</published>
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<id>urn:sha1:de4620391786513a6971029b61663563c4b7b961</id>
<content type='text'>
During testing it was noticed that the link is not properly restored
after the domain exits sleep if the link configured bits are set before
lane bonding is enabled. The USB4 spec does not say in which order these
need to be set but setting link configured afterwards makes the link
restoration work so we do that instead.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add support for authenticate on disconnect</title>
<updated>2020-07-01T10:51:49+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@dell.com</email>
</author>
<published>2020-06-23T16:14:29+00:00</published>
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<id>urn:sha1:1cb36293833766e048cba2026dd860687a2851d9</id>
<content type='text'>
Some external devices can support completing thunderbolt authentication
when they are unplugged. For this to work though, the link controller must
remain operational.

The only device known to support this right now is the Dell WD19TB, so add
a quirk for this.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@dell.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
</feed>
