<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/thunderbolt/debugfs.c, branch v6.13.6</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v6.13.6</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v6.13.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2024-11-01T05:55:38+00:00</updated>
<entry>
<title>thunderbolt: debugfs: Implement asymmetric lane margining</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=916f26f1c24cc0b538b222fc46f500950b942d99'/>
<id>urn:sha1:916f26f1c24cc0b538b222fc46f500950b942d99</id>
<content type='text'>
Add support for the RX2 receiver which is used as the third receiver in
asymmetric links. This requires expanding the results array for the
additional third data word of the hardware margining results.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Don't hardcode margining results size</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=750365ef8c1718de9a7b25799d69ac0ee13be275'/>
<id>urn:sha1:750365ef8c1718de9a7b25799d69ac0ee13be275</id>
<content type='text'>
Use ARRAY_SIZE() when available or pass in the array size derived from
it. This is in preparation for adding another result data word for
supporting Gen 4 asymmetric links with an additional lane.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Refactor hardware margining result parsing</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3499c0a992e432cb8a85616ff4a9019a8924c89a'/>
<id>urn:sha1:3499c0a992e432cb8a85616ff4a9019a8924c89a</id>
<content type='text'>
Make the result parsing and formatting code less repetitive in
preparation for adding another result for Gen 4 asymmetric link support.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Replace margining lane numbers with an enum</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3bf090e9d6df8805ca4d5222ce4d8a1e99ab6724'/>
<id>urn:sha1:3bf090e9d6df8805ca4d5222ce4d8a1e99ab6724</id>
<content type='text'>
Replace the raw values and macros with an enum and use it consistently.
No functional changes.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Replace "both lanes" with "all lanes"</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e6c9905ff4d8f898c06bb30a37ac9ba21885dc26'/>
<id>urn:sha1:e6c9905ff4d8f898c06bb30a37ac9ba21885dc26</id>
<content type='text'>
With USB4 Gen 4, the link can be configured into an asymmetric mode,
where there are three receivers and only one transmitter. The USB4
specification also uses the "all lanes" nomenclature instead of "both
lanes".

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Implement Gen 4 margining eye selection</title>
<updated>2024-11-01T05:55:38+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c8c08fd9c23b5e6a11336675b2584315f87001cc'/>
<id>urn:sha1:c8c08fd9c23b5e6a11336675b2584315f87001cc</id>
<content type='text'>
Add a debugfs knob for USB4 Gen 4 margining eye selection. Gen 4 uses
3-level pulse amplitude modulation (PAM3) which changes how margining
measurements are made because PAM3 has two eyes per lane from which
the margins can be measured.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: debugfs: Add USB4 Gen 4 margining capabilities</title>
<updated>2024-11-01T05:55:37+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c9077d59adf43c9e9303e4651248839162fd9be6'/>
<id>urn:sha1:c9077d59adf43c9e9303e4651248839162fd9be6</id>
<content type='text'>
Parse the Gen 4 specific capabilities. Change the return types of
independent_voltage_margins() and independent_time_margins() to enums
that distinguish between the Gen 2/3 and Gen 4 margins since they behave
differently between generations.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Don't hardcode margining capabilities size</title>
<updated>2024-11-01T05:55:37+00:00</updated>
<author>
<name>Aapo Vienamo</name>
<email>aapo.vienamo@iki.fi</email>
</author>
<published>2024-08-15T18:45:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=480ebc2eb5b28474d2e1b780a826d5e8e8997a7a'/>
<id>urn:sha1:480ebc2eb5b28474d2e1b780a826d5e8e8997a7a</id>
<content type='text'>
Use or pass ARRAY_SIZE() of the capabilities array instead of hardcoding
it. USB4 Gen 4 introduces an additional data word, which requires
expanding the capabilities array.

Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@iki.fi&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Improve software receiver lane margining</title>
<updated>2024-08-22T04:32:06+00:00</updated>
<author>
<name>R Kannappan</name>
<email>r.kannappan@intel.com</email>
</author>
<published>2024-07-19T18:37:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=10904df3f20cf36e418e78ab73c2fbcecda512b8'/>
<id>urn:sha1:10904df3f20cf36e418e78ab73c2fbcecda512b8</id>
<content type='text'>
USB4 specification defines the metadata needed to perform software
margining, as well as the necessary steps which include waiting for
dwell time.

- Add dwell_time attribute to set the wait time while performing
  margining and checking for link errors.
- Add error_counter attribute to configure error counter prior to
  margining test.
- Add voltage_time_offset attribute to set the voltage or time offset
  steps before performing the software margining test.
- Perform software margining test for dwell duration, break if there are
  link errors, stop the clocks and provide results.

Below is a minimalistic example how this can be used. Note these values
are just examples. The exact values in practice depend on host specific
capabilities and the type of measurement to be performed.

  # cd /sys/kernel/debug/thunderbolt/ROUTER/portX/margining/
  # echo software &gt; mode
  # echo 400 &gt; dwell_time
  # echo 1 &gt; run

As usual the results attribute contains the results of a succesfull run.

Signed-off-by: R Kannappan &lt;r.kannappan@intel.com&gt;
Co-developed-by: Rene Sapiens &lt;rene.sapiens@intel.com&gt;
Signed-off-by: Rene Sapiens &lt;rene.sapiens@intel.com&gt;
Co-developed-by: Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;
Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thunderbolt: Add optional voltage offset range for receiver lane margining</title>
<updated>2024-08-22T04:32:06+00:00</updated>
<author>
<name>Rene Sapiens</name>
<email>rene.sapiens@intel.com</email>
</author>
<published>2024-07-19T18:37:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9fafd46b39d140b7359b77e5fcc4c3130788df42'/>
<id>urn:sha1:9fafd46b39d140b7359b77e5fcc4c3130788df42</id>
<content type='text'>
Add optional extended voltage offset range support for software and
hardware margining as defined by the USB4 specification.

If supported, it can be enabled like below:

 # cd /sys/kernel/debug/thunderbolt/ROUTER/portX/margining/
 # echo Y &gt; optional_voltage_offset

Signed-off-by: Rene Sapiens &lt;rene.sapiens@intel.com&gt;
Co-developed-by: R Kannappan &lt;r.kannappan@intel.com&gt;
Signed-off-by: R Kannappan &lt;r.kannappan@intel.com&gt;
Co-developed-by: Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;
Signed-off-by: Aapo Vienamo &lt;aapo.vienamo@linux.intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
</content>
</entry>
</feed>
