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<title>kernel/linux.git/drivers/thermal/Makefile, branch v4.4.171</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.4.171'/>
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<updated>2015-10-30T17:21:01+00:00</updated>
<entry>
<title>thermal: Add devfreq cooling</title>
<updated>2015-10-30T17:21:01+00:00</updated>
<author>
<name>Ørjan Eide</name>
<email>orjan.eide@arm.com</email>
</author>
<published>2015-09-10T17:09:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a76caf55e5b356ba20a5a43ac4d9f7a04b20941d'/>
<id>urn:sha1:a76caf55e5b356ba20a5a43ac4d9f7a04b20941d</id>
<content type='text'>
Add a generic thermal cooling device for devfreq, that is similar to
cpu_cooling.

The device must use devfreq.  In order to use the power extension of the
cooling device, it must have registered its OPPs using the OPP library.

Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Eduardo Valentin &lt;edubezval@gmail.com&gt;
Signed-off-by: Javi Merino &lt;javi.merino@arm.com&gt;
Signed-off-by: Ørjan Eide &lt;orjan.eide@arm.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
<entry>
<title>thermal: Add Intel PCH thermal driver</title>
<updated>2015-08-04T02:06:08+00:00</updated>
<author>
<name>Tushar Dave</name>
<email>tushar.n.dave@intel.com</email>
</author>
<published>2015-06-10T20:34:24+00:00</published>
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<id>urn:sha1:d0a12625d2ff2c63321b3cf48c48184748ab577a</id>
<content type='text'>
This change adds a thermal driver for Wildcat Point platform controller
hub. This driver register PCH thermal sensor as a thermal zone and
associate critical and hot trips if present.

Signed-off-by: Tushar Dave &lt;tushar.n.dave@intel.com&gt;
Reviewed-by: Pandruvada, Srinivas &lt;srinivas.pandruvada@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branches 'release' and 'thermal-soc' of .git into next</title>
<updated>2015-06-11T04:52:14+00:00</updated>
<author>
<name>Zhang Rui</name>
<email>rui.zhang@intel.com</email>
</author>
<published>2015-06-11T04:52:14+00:00</published>
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<id>urn:sha1:111b23cf895b5cbcdc1b2c6580be1bb78a577d05</id>
<content type='text'>
</content>
</entry>
<entry>
<title>thermal: hisilicon: add new hisilicon thermal sensor driver</title>
<updated>2015-06-03T22:58:52+00:00</updated>
<author>
<name>kongxinwei</name>
<email>kong.kongxinwei@hisilicon.com</email>
</author>
<published>2015-05-20T11:16:37+00:00</published>
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<id>urn:sha1:9a5238a9c6c33dd31525f2bba4aa1af4f8374ae1</id>
<content type='text'>
This patch adds the support for hisilicon thermal sensor, within
hisilicon SoC. there will register sensors for thermal framework
and use device tree to bind cooling device.

Signed-off-by: Leo Yan &lt;leo.yan@linaro.org&gt;
Signed-off-by: kongxinwei &lt;kong.kongxinwei@hisilicon.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
<entry>
<title>thermal: introduce the Power Allocator governor</title>
<updated>2015-05-05T04:27:52+00:00</updated>
<author>
<name>Javi Merino</name>
<email>javi.merino@arm.com</email>
</author>
<published>2015-03-02T17:17:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6b775e870c56c59c3e16531ea2307b797395f9f7'/>
<id>urn:sha1:6b775e870c56c59c3e16531ea2307b797395f9f7</id>
<content type='text'>
The power allocator governor is a thermal governor that controls system
and device power allocation to control temperature.  Conceptually, the
implementation divides the sustainable power of a thermal zone among
all the heat sources in that zone.

This governor relies on "power actors", entities that represent heat
sources.  They can report current and maximum power consumption and
can set a given maximum power consumption, usually via a cooling
device.

The governor uses a Proportional Integral Derivative (PID) controller
driven by the temperature of the thermal zone.  The output of the
controller is a power budget that is then allocated to each power
actor that can have bearing on the temperature we are trying to
control.  It decides how much power to give each cooling device based
on the performance they are requesting.  The PID controller ensures
that the total power budget does not exceed the control temperature.

Cc: Zhang Rui &lt;rui.zhang@intel.com&gt;
Cc: Eduardo Valentin &lt;edubezval@gmail.com&gt;
Signed-off-by: Punit Agrawal &lt;punit.agrawal@arm.com&gt;
Signed-off-by: Javi Merino &lt;javi.merino@arm.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
<entry>
<title>thermal: Add QPNP PMIC temperature alarm driver</title>
<updated>2015-05-05T04:27:51+00:00</updated>
<author>
<name>Ivan T. Ivanov</name>
<email>iivanov@mm-sol.com</email>
</author>
<published>2015-02-05T17:12:56+00:00</published>
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<id>urn:sha1:c610afaa21d3c6e7b02040c8563ffc01c7fc0570</id>
<content type='text'>
Add support for the temperature alarm peripheral found inside
Qualcomm plug-and-play (QPNP) PMIC chips. The temperature alarm
peripheral outputs a pulse on an interrupt line whenever the
thermal over temperature stage value changes.

Register a thermal sensor. The temperature reported by this thermal
sensor device should reflect the actual PMIC die temperature if an
ADC is present on the given PMIC. If no ADC is present, then the
reported temperature should be estimated from the over temperature
stage value.

Cc: David Collins &lt;collinsd@codeaurora.org&gt;
Signed-off-by: Ivan T. Ivanov &lt;iivanov@mm-sol.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
<entry>
<title>thermal: intel Quark SoC X1000 DTS thermal driver</title>
<updated>2015-05-01T03:20:43+00:00</updated>
<author>
<name>Ong, Boon Leong</name>
<email>boon.leong.ong@intel.com</email>
</author>
<published>2015-04-15T02:08:15+00:00</published>
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<id>urn:sha1:8c1876939663191b5044807230fa295f35462215</id>
<content type='text'>
In Intel Quark SoC X1000, there is one on-die digital temperature sensor(DTS).
The DTS offers both hot &amp; critical trip points.

However, in current distribution of UEFI BIOS for Quark platform, only
critical trip point is configured to be 105 degree Celsius (based on Quark
SW ver1.0.1 and hot trip point is not used due to lack of IRQ.

There is no active cooling device for Quark SoC, so Quark SoC thermal
management logic expects Linux distro to orderly power-off when temperature
of the DTS exceeds the configured critical trip point.

Kernel param "polling_delay" in milliseconds is used to control the frequency
the DTS temperature is read by thermal framework. It defaults to 2-second.
To change it, use kernel boot param "intel_quark_dts_thermal.polling_delay=X".

User interacts with Quark SoC DTS thermal driver through sysfs via:
/sys/class/thermal/thermal_zone0/

For example:
 - to read DTS temperature
   $ cat temp
 - to read critical trip point
   $ cat trip_point_0_temp
 - to read trip point type
   $ cat trip_point_0_type
 - to emulate temperature raise to test orderly shutdown by Linux distro
   $ echo 105 &gt; emul_temp

Tested-by: Bryan O'Donoghue &lt;pure.logic@nexus-software.ie&gt;
Signed-off-by: Ong Boon Leong &lt;boon.leong.ong@intel.com&gt;
Reviewed-by: Bryan O'Donoghue &lt;pure.logic@nexus-software.ie&gt;
Reviewed-by: Kweh, Hock Leong &lt;hock.leong.kweh@intel.com&gt;
Signed-off-by: Zhang Rui &lt;rui.zhang@intel.com&gt;
</content>
</entry>
<entry>
<title>Thermal: Intel SoC: DTS thermal IOSF core</title>
<updated>2015-05-01T03:20:42+00:00</updated>
<author>
<name>Srinivas Pandruvada</name>
<email>srinivas.pandruvada@linux.intel.com</email>
</author>
<published>2015-03-02T21:12:58+00:00</published>
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<id>urn:sha1:ee073604dba4787b30a754a63af16d13f3d9b846</id>
<content type='text'>
This is becoming a common feature for Intel SoCs to expose the additional
digital temperature sensors (DTSs) using side band interface (IOSF). This
change remove common IOSF DTS handler function from the existing driver
intel_soc_dts_thermal.c and creates a stand alone module, which can
be selected from the SoC specific drivers. In this way there is less
code duplication.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>thermal: rockchip: add driver for thermal</title>
<updated>2014-11-24T18:35:07+00:00</updated>
<author>
<name>Caesar Wang</name>
<email>caesar.wang@rock-chips.com</email>
</author>
<published>2014-11-24T04:58:59+00:00</published>
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<id>urn:sha1:cbac8f63943773218f7f804754209aaa4fae33f9</id>
<content type='text'>
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.

User-defined mode refers,TSADC all the control signals entirely by
software writing to register for direct control.

Automaic mode refers to the module automatically poll TSADC output,
and the results were checked.If you find that the temperature High
in a period of time,an interrupt is generated to the processor
down-measures taken;If the temperature over a period of time High,
the resulting TSHUT gave CRU module,let it reset the entire chip,
or via GPIO give PMIC.

Signed-off-by: zhaoyifeng &lt;zyf@rock-chips.com&gt;
Signed-off-by: Caesar Wang &lt;caesar.wang@rock-chips.com&gt;
Reviewed-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
<entry>
<title>thermal: Add Tegra SOCTHERM thermal management driver</title>
<updated>2014-11-20T14:43:17+00:00</updated>
<author>
<name>Mikko Perttunen</name>
<email>mperttunen@nvidia.com</email>
</author>
<published>2014-09-29T14:17:31+00:00</published>
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<id>urn:sha1:66fb84805134c39f00d7c2054c881faa50910390</id>
<content type='text'>
This adds support for the Tegra SOCTHERM thermal sensing and management
system found in the Tegra124 system-on-chip. This initial driver supports
temperature polling for four thermal zones.

Signed-off-by: Mikko Perttunen &lt;mperttunen@nvidia.com&gt;
Signed-off-by: Eduardo Valentin &lt;edubezval@gmail.com&gt;
</content>
</entry>
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