kernel/linux.git/drivers/staging/axis-fifo, branch v6.18.22

Merge tag 'staging-6.18-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

2025-10-07T18:41:06+00:00

Pull staging driver fixes from Greg KH: "Here are some staging driver fixes that missed 6.17-final due to my travel schedule. They fix a number of reported issues in the axis-fifo driver, one of which was just independently discovered by someone else today so someone is looking at this code. All of these fixes have been in linux-next for many weeks with no reported issues" * tag 'staging-6.18-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: staging: axis-fifo: flush RX FIFO on read errors staging: axis-fifo: fix TX handling on copy_from_user() failure staging: axis-fifo: fix maximum TX packet length check

staging: axis-fifo: flush RX FIFO on read errors

2025-09-12T14:21:46+00:00

Flush stale data from the RX FIFO in case of errors, to avoid reading old data when new packets arrive. Commit c6e8d85fafa7 ("staging: axis-fifo: Remove hardware resets for user errors") removed full FIFO resets from the read error paths, which fixed potential TX data losses, but introduced this RX issue. Fixes: c6e8d85fafa7 ("staging: axis-fifo: Remove hardware resets for user errors") Cc: stable@vger.kernel.org Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250912101322.1282507-2-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: fix TX handling on copy_from_user() failure

2025-09-12T14:21:46+00:00

If copy_from_user() fails, write() currently returns -EFAULT, but any partially written data leaves the TX FIFO in an inconsistent state. Subsequent write() calls then fail with "transmit length mismatch" errors. Once partial data is written to the hardware FIFO, it cannot be removed without a TX reset. Commit c6e8d85fafa7 ("staging: axis-fifo: Remove hardware resets for user errors") removed a full FIFO reset for this case, which fixed a potential RX data loss, but introduced this TX issue. Fix this by introducing a bounce buffer: copy the full packet from userspace first, and write to the hardware FIFO only if the copy was successful. Fixes: c6e8d85fafa7 ("staging: axis-fifo: Remove hardware resets for user errors") Cc: stable@vger.kernel.org Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250912101322.1282507-1-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: fix maximum TX packet length check

2025-08-18T14:27:59+00:00

Since commit 2ca34b508774 ("staging: axis-fifo: Correct handling of tx_fifo_depth for size validation"), write() operations with packets larger than 'tx_fifo_depth - 4' words are no longer rejected with -EINVAL. Fortunately, the packets are not actually getting transmitted to hardware, otherwise they would be raising a 'Transmit Packet Overrun Error' interrupt, which requires a reset of the TX circuit to recover from. Instead, the request times out inside wait_event_interruptible_timeout() and always returns -EAGAIN, since the wake up condition can never be true for these packets. But still, they unnecessarily block other tasks from writing to the FIFO and the EAGAIN return code signals userspace to retry the write() call, even though it will always fail and time out. According to the AXI4-Stream FIFO reference manual (PG080), the maximum valid packet length is 'tx_fifo_depth - 4' words, so attempting to send larger packets is invalid and should not be happening in the first place: > The maximum packet that can be transmitted is limited by the size of > the FIFO, which is (C_TX_FIFO_DEPTH–4)*(data interface width/8) bytes. Therefore, bring back the old behavior and outright reject packets larger than 'tx_fifo_depth - 4' with -EINVAL. Add a comment to explain why the check is necessary. The dev_err() message was removed to avoid cluttering the dmesg log if an invalid packet is received from userspace. Fixes: 2ca34b508774 ("staging: axis-fifo: Correct handling of tx_fifo_depth for size validation") Cc: stable@vger.kernel.org Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250817171350.872105-1-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: use unique identifiers in device names

2025-08-13T14:25:08+00:00

Axis-fifo devices use physical addresses in their name, for example 'axis_fifo_0x43c00000'. This is generally frowned upon and it does not follow the usual naming scheme that uses unique identifiers. Therefore, use ida_alloc()/ida_free() to implement unique identifiers for axis-fifo device names (i.e. axis_fifo0, axis_fifo1, etc.). Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250811085417.2641674-2-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: remove unnecessary dev_set_drvdata() calls

2025-08-11T05:21:22+00:00

Remove unnecessary dev_set_drvdata() calls - driver_data will be set to NULL in device_unbind_cleanup() at driver exit time. This allows us to remove the 'err_initial' label, simplifying the probe function a bit. Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250808204831.2618122-1-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: add debugfs interface for dumping fifo registers

2025-07-24T09:30:03+00:00

For debugging purposes, add a simple, read-only debugfs interface to dump the following fifo registers: ISR - Interrupt Status Register IER - Interrupt Enable Register TDFV - Transmit Data FIFO Vacancy RDFO - Receive Data FIFO Occupancy $ cat /sys/kernel/debug/43c00000.axi_fifo_mm_s/regs isr: 0x00000000 ier: 0xfe000000 tdfv: 0x000001fc rdfo: 0x00000000 Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250720183833.3570345-2-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: remove sysfs interface

2025-07-24T09:30:03+00:00

Unhandled fault: imprecise external abort (0x1406) at 0xaec8d000 [aec8d000] *pgd=03f74831, *pte=0525c75f, *ppte=0525cc7f Internal error: Oops - BUG: 1406 [#1] SMP ARM Hardware name: Xilinx Zynq Platform PC is at sysfs_read+0xc4/0xd8 LR is at dev_attr_show+0x6c/0xc0 pc : [] lr : [] psr: 60070013 sp : e09abd18 ip : c3193000 fp : c0adaccc r10: 00000000 r9 : c3192000 r8 : 183abab5 r7 : c1d5d5a8 r6 : c2d71440 r5 : 00000024 r4 : c3192000 r3 : e0a60024 r2 : 00000000 r1 : c3192000 r0 : c2d71444 ... Call trace: sysfs_read from dev_attr_show+0x6c/0xc0 dev_attr_show from sysfs_kf_seq_show+0x270/0x360 sysfs_kf_seq_show from seq_read_iter+0x7f4/0x10bc seq_read_iter from vfs_read+0x350/0x3d0 vfs_read from ksys_read+0x104/0x194 ksys_read from ret_fast_syscall+0x0/0x54 The same abort is triggered if a read is attempted on RDFD register when the fifo is empty. Therefore, remove the sysfs interface and only let read()/write() modify the fifo registers. For debugging purposes, a simple read-only debugfs interface is added in the next patch. Fixes: 4a965c5f89de ("staging: add driver for Xilinx AXI-Stream FIFO v4.1 IP core") Signed-off-by: Ovidiu Panait Link: https://lore.kernel.org/r/20250720183833.3570345-1-ovidiu.panait.oss@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: Remove hardware resets for user errors

2025-04-25T14:14:25+00:00

The axis-fifo driver performs a full hardware reset (via reset_ip_core()) in several error paths within the read and write functions. This reset flushes both TX and RX FIFOs and resets the AXI-Stream links. Allow the user to handle the error without causing hardware disruption or data loss in other FIFO paths. Fixes: 4a965c5f89de ("staging: add driver for Xilinx AXI-Stream FIFO v4.1 IP core") Cc: stable@vger.kernel.org Signed-off-by: Gabriel Shahrouzi Link: https://lore.kernel.org/r/20250419004306.669605-1-gshahrouzi@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: axis-fifo: Correct handling of tx_fifo_depth for size validation

2025-04-25T14:14:15+00:00

Remove erroneous subtraction of 4 from the total FIFO depth read from device tree. The stored depth is for checking against total capacity, not initial vacancy. This prevented writes near the FIFO's full size. The check performed just before data transfer, which uses live reads of the TDFV register to determine current vacancy, correctly handles the initial Depth - 4 hardware state and subsequent FIFO fullness. Fixes: 4a965c5f89de ("staging: add driver for Xilinx AXI-Stream FIFO v4.1 IP core") Cc: stable@vger.kernel.org Signed-off-by: Gabriel Shahrouzi Link: https://lore.kernel.org/r/20250419012937.674924-1-gshahrouzi@gmail.com Signed-off-by: Greg Kroah-Hartman