kernel/linux.git/drivers/spi, branch v4.17.1

spi: bcm2835aux: ensure interrupts are enabled for shared handler

2018-05-03T23:09:02+00:00

The BCM2835 AUX SPI has a shared interrupt line (with AUX UART). Downstream fixes this with an AUX irqchip to demux the IRQ sources and a DT change which breaks compatibility with older kernels. The AUX irqchip was already rejected for upstream[1] and the DT change would break working systems if the DTB is updated to a newer one. The latter issue was brought to my attention by Alex Graf. The root cause however is a bug in the shared handler. Shared handlers must check that interrupts are actually enabled before servicing the interrupt. Add a check that the TXEMPTY or IDLE interrupts are enabled. [1] https://patchwork.kernel.org/patch/9781221/ Cc: Alexander Graf Cc: Marc Zyngier Cc: Mark Brown Cc: Eric Anholt Cc: Stefan Wahren Cc: Florian Fainelli Cc: Ray Jui Cc: Scott Branden Cc: bcm-kernel-feedback-list@broadcom.com Cc: linux-spi@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring Reviewed-by: Eric Anholt Signed-off-by: Mark Brown

spi: bcm-qspi: Always read and set BSPI_MAST_N_BOOT_CTRL

2018-05-01T20:58:45+00:00

Always confirm the BSPI_MAST_N_BOOT_CTRL bit when enabling or disabling BSPI transfers. Fixes: 4e3b2d236fe00 ("spi: bcm-qspi: Add BSPI spi-nor flash controller driver") Signed-off-by: Kamal Dasu Signed-off-by: Mark Brown Cc: stable@vger.kernel.org

spi: bcm-qspi: Avoid setting MSPI_CDRAM_PCS for spi-nor master

2018-05-01T20:58:37+00:00

Added fix for probing of spi-nor device non-zero chip selects. Set MSPI_CDRAM_PCS (peripheral chip select) with spi master for MSPI controller and not for MSPI/BSPI spi-nor master controller. Ensure setting of cs bit in chip select register on chip select change. Fixes: fa236a7ef24048 ("spi: bcm-qspi: Add Broadcom MSPI driver") Signed-off-by: Kamal Dasu Signed-off-by: Mark Brown Cc: stable@vger.kernel.org

spi: pxa2xx: Allow 64-bit DMA

2018-04-24T15:10:12+00:00

Currently the 32-bit device address only is supported for DMA. However, starting from Intel Sunrisepoint PCH the DMA address of the device FIFO can be 64-bit. Change the respective variable to be compatible with DMA engine expectations, i.e. to phys_addr_t. Fixes: 34cadd9c1bcb ("spi: pxa2xx: Add support for Intel Sunrisepoint") Signed-off-by: Andy Shevchenko Signed-off-by: Mark Brown Cc: stable@vger.kernel.org

spi: cadence: Add usleep_range() for cdns_spi_fill_tx_fifo()

2018-04-18T10:28:29+00:00

In case of xspi work in busy condition, may send bytes failed. once something wrong, spi controller did't work any more My test found this situation appear in both of read/write process. so when TX FIFO is full, add one byte delay before send data; Signed-off-by: sxauwsk Signed-off-by: Mark Brown

spi: sh-msiof: Fix bit field overflow writes to TSCR/RSCR

2018-04-16T14:52:44+00:00

The change fixes a bit field overflow which allows to write to higher bits while calculating SPI transfer clock and setting BRPS and BRDV bit fields, the problem is reproduced if 'parent_rate' to 'spi_hz' ratio is greater than 1024, for instance p->min_div = 2, MSO rate = 33333333, SPI device rate = 10000 results in k = 5, i.e. BRDV = 0b100 or 1/32 prescaler output, BRPS = 105, TSCR value = 0x6804, thus MSSEL and MSIMM bit fields are non-zero. Fixes: 65d5665bb260 ("spi: sh-msiof: Update calculation of frequency dividing") Signed-off-by: Vladimir Zapolskiy Signed-off-by: Mark Brown

spi: imx: Update MODULE_DESCRIPTION to "SPI Controller driver"

2018-04-13T11:18:15+00:00

Now i.MX SPI controller can work in Slave mode. Update MODULE_DESCRIPTION to "SPI Controller driver". Signed-off-by: wangbo Signed-off-by: Mark Brown

Merge tag 'spi-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2018-04-03T19:06:21+00:00

Pull SPI updates from Mark Brown: "A quiet release for SPI, some fixes and small updates for individual drivers with one bigger change from Linus Walleij which coverts the bitbanging SPI driver to use the GPIO descriptor API from Linus Walleij. Since GPIO descriptors were used by platform data this means there's a few changes in arch/ making relevant updates for a few platforms and one misc driver that are affected" * tag 'spi-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (24 commits) MAINTAINERS: update Andi's e-mail spi: spi-atmel: Use correct enum for DMA transfer direction spi: sh-msiof: Document R-Car M3-N support spi: sh-msiof: Use correct enum for DMA transfer direction spi: sprd: Add the support of restarting the system spi: sprd: Simplify the transfer function spi: Fix unregistration of controller with fixed SPI bus number spi: rspi: use correct enum for DMA transfer direction spi: jcore: disable ref_clk after getting its rate spi: bcm-qspi: fIX some error handling paths spi: pxa2xx: Disable runtime PM if controller registration fails spi: tegra20-slink: use true and false for boolean values spi: Fix scatterlist elements size in spi_map_buf spi: atmel: init FIFOs before spi enable spi: orion: Prepare space for per-child options spi: orion: Make the error message greppable spi: orion: Rework GPIO CS handling spi: bcm2835aux: Avoid 64-bit arithmetic in xfer len calc spi: spi-gpio: Augment device tree bindings spi: spi-gpio: Rewrite to use GPIO descriptors ...

Merge remote-tracking branches 'spi/topic/sh-msiof', 'spi/topic/sprd' and 'spi/topic/tegra20-slink' into spi-next

2018-04-02T14:56:45+00:00

Merge remote-tracking branches 'spi/topic/jcore', 'spi/topic/kconfig', 'spi/topic/orion', 'spi/topic/pxa2xx' and 'spi/topic/rspi' into spi-next

2018-04-02T14:56:39+00:00