kernel/linux.git/drivers/soc/tegra, branch v6.18.21

soc/tegra: fuse: Do not register SoC device on ACPI boot

2026-01-02T11:56:56+00:00

commit c87f820bc4748fdd4d50969e8930cd88d1b61582 upstream. On Tegra platforms using ACPI, the SMCCC driver already registers the SoC device. This makes the registration performed by the Tegra fuse driver redundant. When booted via ACPI, skip registering the SoC device and suppress printing SKU information from the Tegra fuse driver, as this information is already provided by the SMCCC driver. Fixes: 972167c69080 ("soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234") Cc: stable@vger.kernel.org Signed-off-by: Kartik Rajput Signed-off-by: Thierry Reding Signed-off-by: Greg Kroah-Hartman

soc/tegra: fuse: speedo-tegra210: Update speedo IDs

2025-12-18T13:03:01+00:00

[ Upstream commit ce27c9c2129679551c4e5fe71c1c5d42fff399c2 ] Existing code only sets CPU and GPU speedo IDs 0 and 1. The CPU DVFS code supports 11 IDs and nouveau supports 5. This aligns with what the downstream vendor kernel supports. Align SKUs with the downstream list. The Tegra210 CVB tables were added in the first referenced fixes commit. Since then, all Tegra210 SoCs have tried to scale to 1.9 GHz, when the supported devkits are only supposed to scale to 1.5 or 1.7 GHZ. Overclocking should not be the default state. Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210") Fixes: 579db6e5d9b8 ("arm64: tegra: Enable DFLL support on Jetson Nano") Signed-off-by: Aaron Kling Signed-off-by: Thierry Reding Signed-off-by: Sasha Levin

Merge tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2025-10-02T00:32:51+00:00

Pull SoC driver updates from Arnd Bergmann: "Lots of platform specific updates for Qualcomm SoCs, including a new TEE subsystem driver for the Qualcomm QTEE firmware interface. Added support for the Apple A11 SoC in drivers that are shared with the M1/M2 series, among more updates for those. Smaller platform specific driver updates for Renesas, ASpeed, Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale SoCs. Driver updates in the cache controller, memory controller and reset controller subsystems. SCMI firmware updates to add more features and improve robustness. This includes support for having multiple SCMI providers in a single system. TEE subsystem support for protected DMA-bufs, allowing hardware to access memory areas that managed by the kernel but remain inaccessible from the CPU in EL1/EL0" * tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits) soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu() soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver soc: fsl: qe: Change GPIO driver to a proper platform driver tee: fix register_shm_helper() pmdomain: apple: Add "apple,t8103-pmgr-pwrstate" dt-bindings: spmi: Add Apple A11 and T2 compatible serial: qcom-geni: Load UART qup Firmware from linux side spi: geni-qcom: Load spi qup Firmware from linux side i2c: qcom-geni: Load i2c qup Firmware from linux side soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem soc: qcom: geni-se: Cleanup register defines and update copyright dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus Documentation: tee: Add Qualcomm TEE driver tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl tee: qcom: add primordial object tee: add Qualcomm TEE driver tee: increase TEE_MAX_ARG_SIZE to 4096 tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF tee: add close_context to TEE driver operation ...

Merge tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2025-10-01T20:14:48+00:00

Pull pin control updates from Linus Walleij: "We have GPIO awareness in the pin control core and an interesting AAEON driver. Core changes: - Allow pins to be identified/marked as GPIO mode with a special callback. The pin controller core is now "aware" if a pin is in GPIO mode if the callback is implemented in the driver, and can thus be marked as "strict", i.e. disallowing simultaneous use of a line as GPIO and another function such as I2C. This is enabled in the Qualcomm TLMM driver and also implemeted from day 1 in the new Broadcom STB driver - Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL to better describe what the config is doing, as well as making it more intuitive what shall be returned when reading this property New drivers: - Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver - Qualcomm Glymur family pin controller driver - Broadcom STB family pin controller driver - Tegra186 pin controller driver - AAEON UP pin controller support. This is some special pin controller that works as an external advanced line MUX and amplifier for signals from an Intel SoC. A cooperative effort with the GPIO maintainer was needed to reach a solution where we reuse code from the GPIO aggregator/forwarder driver - Renesas RZ/T2H and RZ/N2H pin controller support - Axis ARTPEC-8 subdriver for the Samsung pin controller driver Improvements: - Output enable (OEN) support in the Renesas RZG2L driver - Properly support bias pull up/down in the pinctrl-single driver - Move over all GPIO portions using generic MMIO GPIO to the new generic GPIO chip management which has a nice and separate API - Proper DT bindings for some older Broadcom SoCs - External GPIO (EGPIO) support in the Qualcomm SM8250 Deleted code: - Dropped the now unused Samsung S3C24xx drivers" * tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits) pinctrl: use more common syntax for compound literals pinctrl: Simplify printks with pOF format pinctrl: qcom: Add SDM660 LPASS LPI TLMM dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets pinctrl: qcom: Add glymur pinctrl driver dt-bindings: pinctrl: qcom: Add Glymur pinctrl pinctrl: qcom: sm8250: Add egpio support pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL pinctrl: keembay: fix double free in keembay_build_functions() pinctrl: spacemit: fix typo in PRI_TDI pin name pinctrl: eswin: Fix regulator error check and Kconfig dependency pinctrl: bcm: Add STB family pin controller driver dt-bindings: pinctrl: Add support for Broadcom STB pin controller pinctrl: qcom: make the pinmuxing strict pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions pinctrl: qcom: add infrastructure for marking pin functions as GPIOs pinctrl: allow to mark pin functions as requestable GPIOs pinctrl: qcom: use generic pin function helpers pinctrl: make struct pinfunction a pointer in struct function_desc ...

Merge tag 'tegra-for-6.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

2025-09-15T14:21:05+00:00

soc/tegra: Changes for v6.18-rc1 NVMEM cells are added for Tegra114. These contain calibration data for sensors and USB. * tag 'tegra-for-6.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: fuse: Add Tegra114 nvmem cells and fuse lookups Link: https://lore.kernel.org/r/20250914063927.89981-2-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann

soc/tegra: fuse: Add Tegra114 nvmem cells and fuse lookups

2025-09-11T16:19:02+00:00

Add missing Tegra114 nvmem cells and fuse lookups which were added for Tegra124+ but omitted for Tegra114. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Mikko Perttunen Signed-off-by: Thierry Reding

pinctrl: tegra: Add Tegra186 pinmux driver

2025-08-19T11:26:51+00:00

This is based on Nvidia's downstream 5.10 driver, rewritten to match the mainline Tegra194 pinmux driver. Signed-off-by: Aaron Kling Link: https://lore.kernel.org/20250812-tegra186-pinctrl-v3-2-115714eeecb1@gmail.com Signed-off-by: Linus Walleij

soc/tegra: pmc: Ensure power-domains are in a known state

2025-08-11T10:24:43+00:00

After commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync") was applied, the Tegra210 Jetson TX1 board failed to boot. Looking into this issue, before this commit was applied, if any of the Tegra power-domains were in 'on' state when the kernel booted, they were being turned off by the genpd core before any driver had chance to request them. This was purely by luck and a consequence of the power-domains being turned off earlier during boot. After this commit was applied, any power-domains in the 'on' state are kept on for longer during boot and therefore, may never transitioned to the off state before they are requested/used. The hang on the Tegra210 Jetson TX1 is caused because devices in some power-domains are accessed without the power-domain being turned off and on, indicating that the power-domain is not in a completely on state. >From reviewing the Tegra PMC driver code, if a power-domain is in the 'on' state there is no guarantee that all the necessary clocks associated with the power-domain are on and even if they are they would not have been requested via the clock framework and so could be turned off later. Some power-domains also have a 'clamping' register that needs to be configured as well. In short, if a power-domain is already 'on' it is difficult to know if it has been configured correctly. Given that the power-domains happened to be switched off during boot previously, to ensure that they are in a good known state on boot, fix this by switching off any power-domains that are on initially when registering the power-domains with the genpd framework. Note that commit 05cfb988a4d0 ("soc/tegra: pmc: Initialise resets associated with a power partition") updated the tegra_powergate_of_get_resets() function to pass the 'off' to ensure that the resets for the power-domain are in the correct state on boot. However, now that we may power off a domain on boot, if it is on, it is better to move this logic into the tegra_powergate_add() function so that there is a single place where we are handling the initial state of the power-domain. Fixes: a38045121bf4 ("soc/tegra: pmc: Add generic PM domain support") Signed-off-by: Jon Hunter Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250731121832.213671-1-jonathanh@nvidia.com Signed-off-by: Ulf Hansson

Merge tag 'pmdomain-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm

2025-07-29T18:42:31+00:00

Pull pmdomain updates from Ulf Hansson: "pmdomain core: - Leave powered-on genpds on until ->sync_state() or late_initcall_sync - Export a common ->sync_state() helper for genpd providers - Add generic ->sync_state() support - Add a bus/driver for genpd provider-devices - Introduce dev_pm_genpd_is_on() for consumers pmdomain providers: - cpuidle-psci: Drop redundant ->sync_state() support - cpuidle-riscv-sbi: Drop redundant ->sync_state() support - imx: Set ISI panic write for imx8m-blk-ctrl - qcom: Add support for Glymur and Milos RPMh power-domains - qcom: Use of_genpd_sync_state() for power-domains - rockchip: Add support for the RK3528 variant - samsung: Fix splash-screen handover by enforcing a ->sync_state() - sunxi: Add support for Allwinner A523's PCK600 power-controller - tegra: Opt-out from genpd's common ->sync_state() support for pmc - thead: Instantiate a GPU power sequencer via the auxiliary bus - renesas: Move init to postcore_initcalls - xilinx: Move ->sync_state() support to firmware driver - xilinx: Use of_genpd_sync_state() for power-domains pmdomain consumers: - remoteproc: imx_rproc: Fixup the detect/attach procedure for pre-booted cores" * tag 'pmdomain-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (44 commits) pmdomain: qcom: rpmhpd: Add Glymur RPMh Power Domains dt-bindings: power: rpmpd: Add Glymur power domains remoteproc: imx_rproc: detect and attach to pre-booted remote cores remoteproc: imx_rproc: skip clock enable when M-core is managed by the SCU pmdomain: core: introduce dev_pm_genpd_is_on() pmdomain: ti: Select PM_GENERIC_DOMAINS pmdomain: sunxi: sun20i-ppu: change to tristate and enable for ARCH_SUNXI pmdomain: sunxi: add driver for Allwinner A523's PCK-600 power controller pmdomain: sunxi: sun20i-ppu: add A523 support pmdomain: samsung: Fix splash-screen handover by enforcing a sync_state cpuidle: riscv-sbi: Drop redundant sync_state support cpuidle: psci: Drop redundant sync_state support pmdomain: core: Leave powered-on genpds on until sync_state pmdomain: core: Leave powered-on genpds on until late_initcall_sync pmdomain: core: Default to use of_genpd_sync_state() for genpd providers driver core: Add dev_set_drv_sync_state() pmdomain: core: Add common ->sync_state() support for genpd providers driver core: Export get_dev_from_fwnode() firmware: xilinx: Use of_genpd_sync_state() firmware: xilinx: Don't share zynqmp_pm_init_finalize() ...

Merge tag 'soc-defconfig-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2025-07-29T18:27:41+00:00

Pull SoC defconfig updates from Arnd Bergmann: "As usual, more drivers get enabled in the defconfigs, to support newly added hardware drivers. There is one change for Tegra that modifies the Kconfig file at the same time, and the NXP arm32 defconfigs get a refresh" * tag 'soc-defconfig-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) arm: multi_v7_defconfig: Enable TPS65219 regulator arm: omap2plus_defconfig: Enable TPS65219 regulator arm64: defconfig: Enable Tegra241 and Tegra264 riscv: defconfig: spacemit: enable sdhci driver for K1 SoC riscv: defconfig: Enable PWM support for SpacemiT K1 SoC riscv: defconfig: Remove CONFIG_SND_SOC_STARFIVE=m arm64: defconfig: Enable Tegra HSP and BPMP ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503 ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER ARM: imx_v6_v7_defconfig: cleanup with savedefconfig ARM: mxs_defconfig: select new drivers used by imx28-amarula-rmm ARM: mxs_defconfig: Cleanup mxs_defconfig arm64: defconfig: enable further Rockchip platform drivers arm64: defconfig: enable Samsung PMIC over ACPM arm64: defconfig: enable Maxim max77759 driver ARM: configs: sama5_defconfig: Select CONFIG_WILC1000_SDIO ARM: shmobile: defconfig: Refresh for v6.16-rc2 arm64: defconfig: Enable RZ/V2H(P) USB2 PHY controller reset driver arm64: defconfig: add S32G RTC module support arm64: defconfig: Drop unneeded unselectable sound drivers ...