<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/soc/tegra, branch v4.11.5</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.11.5</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.11.5'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2016-11-15T14:51:56+00:00</updated>
<entry>
<title>soc/tegra: pmc: Use consistent naming for PM domains</title>
<updated>2016-11-15T14:51:56+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-11-08T10:05:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4522112069a976908e32e5dd3231c9272d19794a'/>
<id>urn:sha1:4522112069a976908e32e5dd3231c9272d19794a</id>
<content type='text'>
The various error messages refer to the PM domains as "power domain",
"genpd" and "PM domain". That's confusing, so convert all error messages
to use the most prominent: "PM domain".

Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Remove genpd when adding provider fails</title>
<updated>2016-11-15T14:51:55+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2016-10-22T19:23:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=0b137340d04b9dfa911cc882bc26ed611671f5f5'/>
<id>urn:sha1:0b137340d04b9dfa911cc882bc26ed611671f5f5</id>
<content type='text'>
Commit 3fe577107ccf ("PM / Domains: Add support for removing PM
domains") add support for removing PM domains. Update the Tegra PMC
driver to remove PM domains if we fail to add a provider for the PM
domain.

Please note that the code under 'power_on_cleanup' label does not
really belong in the clean-up error path for tegra_powergate_add().
To keep the error path simple, remove this label and move the
associated code to where it needs to be invoked.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Check return code for pm_genpd_init()</title>
<updated>2016-11-15T14:51:54+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2016-10-22T19:23:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=cd5ceda27d4b45b797ede85c844fc08da5aa70e3'/>
<id>urn:sha1:cd5ceda27d4b45b797ede85c844fc08da5aa70e3</id>
<content type='text'>
Commit 7eb231c337e0 ("PM / Domains: Convert pm_genpd_init() to return
an error code") updated pm_genpd_init() to return an error code. Update
the Tegra PMC driver to check the return value from pm_genpd_init() and
handle any errors returned.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
[treding@nvidia.com: use pr_err() instead of dev_err()]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Clean-up I/O rail error messages</title>
<updated>2016-11-15T14:51:53+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-11-08T09:58:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=54e247211f6ba24f8fc0cbbd801d4d58e9b161ea'/>
<id>urn:sha1:54e247211f6ba24f8fc0cbbd801d4d58e9b161ea</id>
<content type='text'>
Use pr_err() instead of dev_err() when the pmc-&gt;dev field has not been
initialized yet and add a few missing error messages as well as remove
duplicate ones.

Based on work by Jon Hunter &lt;jonathanh@nvidia.com&gt;.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Simplify IO rail bit handling</title>
<updated>2016-11-15T14:51:53+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2016-10-22T19:23:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=27b12b4e58525f7e8a612af5a3999126d0ea76fb'/>
<id>urn:sha1:27b12b4e58525f7e8a612af5a3999126d0ea76fb</id>
<content type='text'>
The function tegra_io_rail_prepare() converts the IO rail ID into a
bit position that is used to check the status and control the IO rail
in the PMC registers. However, rather than converting to a bit position
it is more useful to convert to a bit-mask because this is what is
actually used. By doing so the BIT() marco only needs to be used once
and we can use the IO_DPD_REQ_CODE_MASK when checking for erroneous rail
IDs.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
[treding@nvidia.com: rebase and rename bit -&gt; mask]
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Guard against uninitialised PMC clock</title>
<updated>2016-11-15T14:51:52+00:00</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2016-10-22T19:23:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=f4392d6da5f52727a53298321f4dfeac6df1a093'/>
<id>urn:sha1:f4392d6da5f52727a53298321f4dfeac6df1a093</id>
<content type='text'>
It is possible for the public functions, tegra_io_rail_power_on/off()
to be called before the PMC device has been probed. If this happens
then the pmc-&gt;clk member will not be initialised and the call to
clk_get_rate() in tegra_io_rail_prepare() will return zero and lead
to a divide-by-zero exception. The function clk_get_rate() will return
zero if a NULl clk pointer is passed. Therefore, rather that checking
if pmc-&gt;clk is initialised, fix this by checking the return value for
clk_get_rate() to make sure it is not zero.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Add I/O pad voltage support</title>
<updated>2016-11-15T14:51:51+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-10-10T13:14:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=21b4991051780b49b217c363f79366ed94c3b4b7'/>
<id>urn:sha1:21b4991051780b49b217c363f79366ed94c3b4b7</id>
<content type='text'>
I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such
pad can be used to control the common voltage signal level and power
state of the pins in the given pad.

I/O pads can be powered down even if the system is active, which can
save power from that I/O interface. For SoC generations prior to
Tegra124 the I/O pad voltage is automatically detected and hence the
system software doesn't need to configure it. However, starting with
Tegra210 the detection logic has been removed, so explicit control of
the I/O pad voltage by system software is required.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Use consistent ordering of bit definitions</title>
<updated>2016-11-15T14:51:51+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2016-10-10T11:13:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=95b780b3d7e3f1900e09dfe90e959f220a8df343'/>
<id>urn:sha1:95b780b3d7e3f1900e09dfe90e959f220a8df343</id>
<content type='text'>
Bit definitions are sorted in decreasing order by offset. Apply the same
ordering to all definitions.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()</title>
<updated>2016-11-15T14:51:50+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T13:06:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=84cf85ea6ea29fc0c933a85fb3e900315759a581'/>
<id>urn:sha1:84cf85ea6ea29fc0c933a85fb3e900315759a581</id>
<content type='text'>
The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of variable where this data is stored to u32
type.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>soc/tegra: pmc: Use BIT macro for register field definition</title>
<updated>2016-11-15T14:51:49+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T13:06:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6c0bd217c361fa820d953e33fc7b6b95571c28ac'/>
<id>urn:sha1:6c0bd217c361fa820d953e33fc7b6b95571c28ac</id>
<content type='text'>
Use BIT macro for register field definition and make constant as U
when using in shift operator like (3 &lt;&lt; 30) to (3U &lt;&lt; 30)

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
