kernel/linux.git/drivers/soc/tegra/fuse, branch v6.6.134Linux kernel stable tree (mirror)https://git.radix-linux.su/kernel/linux.git/atom?h=v6.6.1342025-11-24T09:29:20+00:00soc/tegra: fuse: Add Tegra114 nvmem cells and fuse lookups2025-11-24T09:29:20+00:00Svyatoslav Ryhelclamor95@gmail.com2025-08-28T05:50:59+00:00urn:sha1:ca7c230fff4196cbb18677699394f922b9918cbe
[ Upstream commit b9c01adedf38c69abb725a60a05305ef70dbce03 ]
Add missing Tegra114 nvmem cells and fuse lookups which were added for
Tegra124+ but omitted for Tegra114.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
soc/tegra: fuse: Update Tegra234 nvmem keepout list2025-02-21T12:57:09+00:00Kartik Rajputkkartik@nvidia.com2024-11-27T06:10:53+00:00urn:sha1:3a4f623bb6f22710cbfb48dfb87bf36d78d23968
[ Upstream commit 836b341cc8dab680acc06a7883bfeea89680b689 ]
Various Nvidia userspace applications and tests access following fuse
via Fuse nvmem interface:
* odmid
* odminfo
* boot_security_info
* public_key_hash
* reserved_odm0
* reserved_odm1
* reserved_odm2
* reserved_odm3
* reserved_odm4
* reserved_odm5
* reserved_odm6
* reserved_odm7
* odm_lock
* pk_h1
* pk_h2
* revoke_pk_h0
* revoke_pk_h1
* security_mode
* system_fw_field_ratchet0
* system_fw_field_ratchet1
* system_fw_field_ratchet2
* system_fw_field_ratchet3
* optin_enable
Update tegra234_fuse_keepouts list to allow reading these fuse from
nvmem sysfs interface.
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Link: https://lore.kernel.org/r/20241127061053.16775-1-kkartik@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
soc/tegra: fuse: Sort includes alphabetically2023-07-27T16:44:41+00:00Thierry Redingtreding@nvidia.com2023-07-27T14:32:46+00:00urn:sha1:ac60f06215fda9ea10ac0b2a3bc3a1e7ba4a8fd1
The includes were slightly out of order, so sort them correctly.
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Use devm_platform_get_and_ioremap_resource()2023-07-21T15:26:03+00:00Yangtao Lifrank.li@vivo.com2023-07-05T12:26:40+00:00urn:sha1:6674c9808048f28f979fc4c57994d936d477d3ed
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.
Signed-off-by: Yangtao Li <frank.li@vivo.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: Explicitly include correct DT includes2023-07-21T15:12:19+00:00Rob Herringrobh@kernel.org2023-07-14T17:51:54+00:00urn:sha1:8297603c79821fa9bcf92cef28aaf8ea58725183
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Fix Tegra234 fuse size2023-06-08T16:35:05+00:00Kartikkkartik@nvidia.com2023-06-06T15:36:08+00:00urn:sha1:e180cf836433185d0674ade52f8db911d89f6422
The Tegra234 fuse size is incorrectly defined as 0x98c. The actual size
of the Tegra234 fuses is 0xf8c and so update the size of the Tegra234
fuses to fix this.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add support for Tegra2642023-05-16T08:58:50+00:00Stefan Kristianssonstefank@nvidia.com2023-05-11T13:20:48+00:00urn:sha1:d94436465152465555c8e5efbe611db40c9749f7
Add support for Tegra264 to the fuse handling code.
Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Remove nvmem root only access2023-04-05T15:10:40+00:00Kartikkkartik@nvidia.com2023-01-17T08:30:55+00:00urn:sha1:821d96e3a006d09ca9aa3d982c50f3d86fa55500
To read fuse values, various "non-root" userspace applications require
access to nvmem binary interface.
Remove root only access for nvmem userspace binary interface.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Use platform info with SoC revision2022-11-11T14:00:07+00:00Kartikkkartik@nvidia.com2022-11-09T14:20:22+00:00urn:sha1:bebf683ba6829f544011411580bcd620b7581087
Tegra pre-silicon platforms do not have chip revisions. This makes the
revision SoC attribute meaningless on these platforms.
Instead, populate the revision SoC attribute with a combination of the
platform name and the chip revision for silicon platforms, and simply
with the platform name on pre-silicon platforms.
Signed-off-by: Kartik <kkartik@nvidia.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
soc/tegra: fuse: Add nvmem keepout list2022-10-24T15:09:55+00:00Kartikkkartik@nvidia.com2022-10-07T09:51:07+00:00urn:sha1:cc5b2ad5393ec237c8697bb3989a34c0c3beb2f6
On Tegra186 and later, various FUSE offsets are restricted and cannot be
accessed from CCPLEX. Currently nvmem binary interface allows reading
such offsets from userspace, which results in RAS errors.
Add nvmem keepout lists to avoid any reads to restricted offsets.
Signed-off-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>