kernel/linux.git/drivers/soc/tegra/Kconfig, branch linux-4.16.y

soc/tegra: pmc: Consolidate Tegra186 support

2017-12-13T12:06:44+00:00

Move Tegra186 support to the consolidated PMC driver to reduce some of the duplication and also gain I/O pad functionality on the new SoC as a side-effect. Signed-off-by: Thierry Reding

soc/tegra: Register SoC device

2017-08-17T14:43:13+00:00

Move this code from arch/arm/mach-tegra and make it common among 32-bit and 64-bit Tegra SoCs. This is slightly complicated by the fact that on 32-bit Tegra, the SoC device is used as the parent for all devices that are instantiated from device tree. Signed-off-by: Thierry Reding

soc/tegra: bpmp: Implement generic PM domains

2017-06-13T13:23:29+00:00

The BPMP firmware, found on Tegra186 and later, provides an ABI that can be used to enable and disable power to several power partitions in Tegra SoCs. The ABI allows for enumeration of the available power partitions, so the driver can be reused on future generations, provided the BPMP ABI remains stable. Based on work by Stefan Kristiansson and Mikko Perttunen . Signed-off-by: Thierry Reding Reviewed-by: Ulf Hansson Signed-off-by: Thierry Reding

soc/tegra: Add initial flowctrl support for Tegra132/210

2017-04-04T13:52:31+00:00

Tegra132 and Tegra210 support the flowctrl module and so add initial support for these devices. Please note that Tegra186 does not support the flowctrl module, so update the initialisation function such that we do not fall back and attempt to map the 'hardcoded' address range for Tegra186. Furthermore 64-bit Tegra devices have always had the flowctrl node defined in their device-tree and so only use the 'hardcoded' addresses for 32-bit Tegra devices. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: Move Tegra flowctrl driver

2017-04-04T13:48:04+00:00

The flowctrl driver is required for both ARM and ARM64 Tegra devices and in order to enable support for it for ARM64, move the Tegra flowctrl driver into drivers/soc/tegra. By moving the flowctrl driver, tegra_flowctrl_init() is now called by via an early initcall and to prevent this function from attempting to mapping IO space for a non-Tegra device, a test for 'soc_is_tegra()' is also added. Signed-off-by: Jon Hunter Signed-off-by: Thierry Reding

soc/tegra: Implement Tegra186 PMC support

2017-04-04T13:43:50+00:00

The power management controller on Tegra186 has changed in backwards- incompatible ways with respect to earlier generations. This implements a new driver that supports inversion of the PMU interrupt as well as the "recovery", "bootloader" and "forced-recovery" reboot commands. Acked-by: Rob Herring Signed-off-by: Thierry Reding

soc/tegra: Add Tegra186 support

2016-11-15T14:50:50+00:00

The Tegra186 features a combination of Denver and Cortex-A57 CPU cores and a GPU based on the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU used for audio processing, hardware video encoders and decoders with multi-format support, ISP for image capture processing and BPMP for power management. Signed-off-by: Joseph Lo Signed-off-by: Thierry Reding

ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select

2016-04-12T15:09:28+00:00

These two are both ARMv7 SoCs. They need not explicitly select ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7. Refer to commit a092f2b15399 ("ARM: 7291/1: cache: assume 64-byte L1 cachelines for ARMv7 CPUs"). Signed-off-by: Masahiro Yamada Signed-off-by: Thierry Reding

ARM: tegra: select USB_ULPI from EHCI rather than platform

2015-11-24T15:47:26+00:00

For historic reasons, the tegra platform selects USB_ULPI from architecture code, but that hasn't really made sense for a long time, as the only user of that code is the Tegra EHCI driver that has its own Kconfig symbol. This removes the 'select' statements from mach-tegra and drivers/soc/tegra and adds them with the device driver that actually needs them. Signed-off-by: Arnd Bergmann Signed-off-by: Thierry Reding

soc/tegra: Add Tegra210 support

2015-11-24T15:47:24+00:00

Also known as Tegra X1, the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 cores in a switched configuration. It features a GPU using the Maxwell architecture with support for DX11, SM4, OpenGL 4.5, OpenGL ES 3.1 and providing 256 CUDA cores. It supports hardware accelerated en- and decoding of various video standards including H.265, H.264 and VP8 at 4K resolutions and up to 60 fps. Besides the multimedia features it also comes with a variety of I/O controllers such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to name only a few. Add a Kconfig option for Tegra210 to allow SoC-specific support to be enabled for this new generation. Signed-off-by: Thierry Reding