<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/soc/rockchip, branch v4.17.1</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=v4.17.1</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=v4.17.1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2018-03-05T18:42:29+00:00</updated>
<entry>
<title>soc: rockchip: power-domain: Add a sanity check on pd-&gt;num_clks</title>
<updated>2018-03-05T18:42:29+00:00</updated>
<author>
<name>Jeffy Chen</name>
<email>jeffy.chen@rock-chips.com</email>
</author>
<published>2018-03-05T09:17:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=b1271993aa3855bda5073c6061a095fd6e6febc6'/>
<id>urn:sha1:b1271993aa3855bda5073c6061a095fd6e6febc6</id>
<content type='text'>
The of_count_phandle_with_args() can fail and return error(for example,
rk3399 pd_vio doesn't have clocks). That would break the pd probe.

Add a sanity check on pd-&gt;num_clks to avoid that.

Fixes: 65084121d59d ("soc: rockchip: power-domain: use clk_bulk APIs")
Reported-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Tested-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: power-domain: use clk_bulk APIs</title>
<updated>2018-03-05T18:42:28+00:00</updated>
<author>
<name>Jeffy Chen</name>
<email>jeffy.chen@rock-chips.com</email>
</author>
<published>2018-02-28T12:41:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=d909072d0521a84e67fbe5cce602d7befffabf7e'/>
<id>urn:sha1:d909072d0521a84e67fbe5cce602d7befffabf7e</id>
<content type='text'>
Use clk_bulk APIs, and also add error handling for clk enable.

Signed-off-by: Jeffy Chen &lt;jeffy.chen@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: disable jtag switching for RK3128 SoCs</title>
<updated>2018-03-05T18:42:23+00:00</updated>
<author>
<name>Xiao Yao</name>
<email>xiaoyao@rock-chips.com</email>
</author>
<published>2018-01-18T09:56:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6e61c891a0bbe3cede4157b4ecdfbd1617098b5a'/>
<id>urn:sha1:6e61c891a0bbe3cede4157b4ecdfbd1617098b5a</id>
<content type='text'>
Disable IO function switching between sdmmc and jtag
for RK3128 SoCs.

Signed-off-by: Xiao Yao &lt;xiaoyao@rock-chips.com&gt;
Reviewed-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: disable jtag switching for RK3228/RK3229 SoCs</title>
<updated>2018-02-12T08:39:11+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2018-02-07T06:20:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e17ee5f08b9849b9f80fadab96364121c6bdd207'/>
<id>urn:sha1:e17ee5f08b9849b9f80fadab96364121c6bdd207</id>
<content type='text'>
Disable IO function switching between sdmmc and jtag
for RK3228 and RK3229 SoCs.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: power-domain: Use GENPD_FLAG_ACTIVE_WAKEUP</title>
<updated>2017-11-08T00:00:47+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2017-11-07T12:48:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=89c7aea915c0c9820191a533e1f304e234074b2d'/>
<id>urn:sha1:89c7aea915c0c9820191a533e1f304e234074b2d</id>
<content type='text'>
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: power-domain: add power domain support for rk3366</title>
<updated>2017-07-20T20:42:19+00:00</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2017-07-14T07:02:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=bd85f4b76916f9d9d7130e58601662133399079a'/>
<id>urn:sha1:bd85f4b76916f9d9d7130e58601662133399079a</id>
<content type='text'>
This driver is modified to support RK3366 SoC.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: disable jtag switching for RK3328 Soc</title>
<updated>2017-07-16T15:08:12+00:00</updated>
<author>
<name>Shawn Lin</name>
<email>shawn.lin@rock-chips.com</email>
</author>
<published>2017-05-25T07:58:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=887758c325487ac747e03d552de42ec0ceaf214d'/>
<id>urn:sha1:887758c325487ac747e03d552de42ec0ceaf214d</id>
<content type='text'>
Disable IO function switching between sdmmc and jtag
for RK3328 Soc.

Signed-off-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: add driver handling grf setup</title>
<updated>2017-01-06T09:28:19+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2016-11-16T23:03:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=4c58063d4258f6beb4fd5647db6b58f49e337c8f'/>
<id>urn:sha1:4c58063d4258f6beb4fd5647db6b58f49e337c8f</id>
<content type='text'>
The General Register Files are an area of registers containing a lot
of single-bit settings for numerous components as well full components
like usbphy control. Therefore all used components are accessed
via the syscon provided by the grf nodes or from the sub-devices
created through the simple-mfd created from the grf node.

Some settings are not used by anything but will need to be set up
according to expectations on the kernel side.

Best example is the force_jtag setting, which defaults to on and
results in the soc switching the pin-outputs between jtag and sdmmc
automatically depending on the card-detect status. This conflicts
heavily with how the dw_mmc driver expects to do its work and also
with the clock-controller, which has most likely deactivated the
jtag clock due to it being unused.

So far the handling of this setting was living in the mach-rockchip
code for the arm32-based rk3288 but that of course doesn't work
for arm64 socs and would also look ugly for further arm32 socs.

Also always disabling this setting is quite specific to linux and
its subsystems, other operating systems might prefer other settings,
so that the bootloader cannot really set a sane default for all.

So introduce a top-level driver for the grf that handles these
settings that need to be a certain way but nobody cares about.

Other needed settings might surface in the future and can then
be added here, but only as a last option. Ideally general GRF
settings should be handled in the driver needing them.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: power-domain: add power domain support for rk3328</title>
<updated>2017-01-05T13:35:09+00:00</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2016-12-23T03:47:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=e9284603d857c3bf9e0c598251cd9370b7227550'/>
<id>urn:sha1:e9284603d857c3bf9e0c598251cd9370b7227550</id>
<content type='text'>
The rk3328 uses the newly introduced support for power-domain control
in hiword-mask registers.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
<entry>
<title>soc: rockchip: power-domain: Support domain control in hiword-registers</title>
<updated>2017-01-05T13:29:55+00:00</updated>
<author>
<name>Elaine Zhang</name>
<email>zhangqing@rock-chips.com</email>
</author>
<published>2016-12-23T03:47:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=79bb17ce8edb3141339b5882e372d0ec7346217c'/>
<id>urn:sha1:79bb17ce8edb3141339b5882e372d0ec7346217c</id>
<content type='text'>
New Rockchips SoCs may have their power-domain control in registers
using a writemask-based access scheme (upper 16bit being the write
mask). So add a DOMAIN_M type and handle this case accordingly.

Signed-off-by: Elaine Zhang &lt;zhangqing@rock-chips.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
</feed>
