kernel/linux.git/drivers/soc/rockchip, branch v4.11.5

soc: rockchip: add driver handling grf setup

2017-01-06T09:28:19+00:00

The General Register Files are an area of registers containing a lot of single-bit settings for numerous components as well full components like usbphy control. Therefore all used components are accessed via the syscon provided by the grf nodes or from the sub-devices created through the simple-mfd created from the grf node. Some settings are not used by anything but will need to be set up according to expectations on the kernel side. Best example is the force_jtag setting, which defaults to on and results in the soc switching the pin-outputs between jtag and sdmmc automatically depending on the card-detect status. This conflicts heavily with how the dw_mmc driver expects to do its work and also with the clock-controller, which has most likely deactivated the jtag clock due to it being unused. So far the handling of this setting was living in the mach-rockchip code for the arm32-based rk3288 but that of course doesn't work for arm64 socs and would also look ugly for further arm32 socs. Also always disabling this setting is quite specific to linux and its subsystems, other operating systems might prefer other settings, so that the bootloader cannot really set a sane default for all. So introduce a top-level driver for the grf that handles these settings that need to be a certain way but nobody cares about. Other needed settings might surface in the future and can then be added here, but only as a last option. Ideally general GRF settings should be handled in the driver needing them. Signed-off-by: Heiko Stuebner Reviewed-by: Douglas Anderson

soc: rockchip: power-domain: add power domain support for rk3328

2017-01-05T13:35:09+00:00

The rk3328 uses the newly introduced support for power-domain control in hiword-mask registers. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: Support domain control in hiword-registers

2017-01-05T13:29:55+00:00

New Rockchips SoCs may have their power-domain control in registers using a writemask-based access scheme (upper 16bit being the write mask). So add a DOMAIN_M type and handle this case accordingly. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: Handle errors from of_genpd_add_provider_onecell

2016-11-11T01:14:59+00:00

It was a bit surprising that the device was reported to have probed just fine, but the provider hadn't been registered. So handle any errors when registering the provider and fail the probe accordingly. Signed-off-by: Tomeu Vizoso Cc: Caesar Wang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: use pm_genpd_remove in error cleanup

2016-11-11T01:14:59+00:00

The newly introduced pm_genpd_remove reverts the initialization done by pm_genpd_init and is necessary in the error path of the rockchip power-domain driver. Without it the driver will in the error case cleanup the devm-allocated structures including the elements referenced in the gpd_list thus making deactivation of unused domains (and probably later genpd accesses as well) fail by accessing invalid pointers. Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: avoid infinite loop

2016-11-01T23:17:59+00:00

In some cases, we have met the infinite loop in rockchip_pmu_set_idle_request() or rockchip_do_pmu_set_power_domain(). As the crosbug.com/p/57351 reported, the boot hangs right after this [1.629163] bootconsole [uart8250] disabled [1.639286] [drm:drm_core_init] Initialized drm 1.1.0 20060810 [1.645926] [drm:drm_get_platform_dev] Initialized vgem 1.0.0 20120112.. [1.654558] iommu: Adding device ff8f0000.vop to group 0 [1.660569] iommu: Adding device ff900000.vop to group 1 This patch adds the error message and timeout to avoid infinite loop if it fails to get the ack. Signed-off-by: Caesar Wang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: Don't (incorrectly) set rk3399 up/down counts

2016-10-16T00:42:29+00:00

On rk3288 it was important that powerdown and powerup counts for the CPU/GPU in the kernel because: * The power on default was crazy long. * We couldn't rely on the firmware to set this up because really this wasn't the firmware's job--the kernel was the only one that really cared about bringing up / down CPUs and the GPU and doing suspend / resume (which involves bringing up / down CPUs). On newer ARM systems (like rk3399) ARM Trusted Firmware is in charge of bringing up and down the CPUs and it really should be in charge of setting all these counts right. After all ATF is in charge of suspend / resume and CPU up / down. Let's get out of the way and let ATF do its job. A few other motivations for doing this: * Depending on another configuration (PMU_24M_EN_CFG) these counts can be either in 24M or 32k cycles. Thus, though ATF isn't really so involved in bringing up the GPU, ATF should probably manage the counts for everything so it can also manage the 24M / 32k choice. * It turns out that (right now) 24M mode is broken on rk3399 and not being used. That means that the count the kernel was programming in (24) was not 1 us (which it seems was intended) but was actually .75 ms * On rk3399 there are actually 2 separate registers for setting CPU up/down time plus 1 register for GPU up/down time. The curent kernel code actually was putting the register for the "little" cores in the "CPU" slot and the register for the "big" cores in the "GPU" slot. It was never initting the GPU counts. Note: this change assumes that ATF will actually set these values at boot, as I'm proposing in . Signed-off-by: Douglas Anderson [ATF change has landed] Signed-off-by: Heiko Stuebner

soc: rockchip: support active_wakeup for rockchip power-domains

2016-08-18T22:37:20+00:00

Register gpd_dev_ops.active_wakeup function to support keep power during suspend state. And add flag to each power domain to decide whether keep power during suspend or not. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: support qos save and restore

2016-04-21T21:02:16+00:00

support qos save and restore when power domain on/off. Signed-off-by: Elaine Zhang Signed-off-by: Heiko Stuebner

soc: rockchip: power-domain: check the existing of regmap

2016-04-12T01:28:08+00:00

Check return value of syscon_node_to_regmap for rockchip_pm_domain_probe. If err value is returned, probe procedure should abort. Signed-off-by: Shawn Lin Signed-off-by: Heiko Stuebner