kernel/linux.git/drivers/soc/renesas, branch v6.1.174

pmdomain: renesas: r8a77980-sysc: CR7 must be always on

2024-03-01T12:26:30+00:00

[ Upstream commit f0e4a1356466ec1858ae8e5c70bea2ce5e55008b ] The power domain containing the Cortex-R7 CPU core on the R-Car V3H SoC must always be in power-on state, unlike on other SoCs in the R-Car Gen3 family. See Table 9.4 "Power domains" in the R-Car Series, 3rd Generation Hardware User’s Manual Rev.1.00 and later. Fix this by marking the domain as a CPU domain without control registers, so the driver will not touch it. Fixes: 41d6d8bd8ae9 ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/fdad9a86132d53ecddf72b734dac406915c4edc0.1705076735.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson Signed-off-by: Sasha Levin

soc: renesas: renesas-soc: Release 'chipid' from ioremap()

2023-05-11T14:03:12+00:00

[ Upstream commit fc187a46a8e682f0f1167b230792b88de01ceaa0 ] Smatch reports: drivers/soc/renesas/renesas-soc.c:536 renesas_soc_init() warn: 'chipid' from ioremap() not released on lines: 475. If soc_dev_atrr allocation is failed, function renesas_soc_init() will return without releasing 'chipid' from ioremap(). Fix this by adding function iounmap(). Fixes: cb5508e47e60 ("soc: renesas: Add support for reading product revision for RZ/G2L family") Signed-off-by: Li Yang Reviewed-by: Dan Carpenter Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230331095545.31823-1-lidaxian@hust.edu.cn Signed-off-by: Geert Uytterhoeven Signed-off-by: Sasha Levin

soc: renesas: Identify RZ/Five SoC

2022-08-16T07:24:44+00:00

Add support for identifying the (R9A07G043) RZ/Five SoC. Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20220722141506.20171-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven

soc: renesas: Identify R-Car H3Ne-1.7G

2022-08-16T07:20:34+00:00

Add support for identifying the R-Car H3Ne-1.7G (R8A779MB) SoC. As this is a different grading of the already supported R-Car H3-N ES3.0 (R8A77951) SoC, support for it is enabled through the existing ARCH_R8A77951 configuration symbol. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/8670482178567897571edc0dfc60017453544071.1656072871.git.geert+renesas@glider.be

soc: renesas: Kconfig: Enable IRQC driver for RZ/G2L SoC

2022-08-15T08:19:01+00:00

Select RENESAS_RZG2L_IRQC config option if ARCH_RZG2L is enabled so that IRQC driver is enabled on RZ/G2L (and alike) SoC's. Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/20220718192824.7246-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven

soc: renesas: rcar-sysc: Optimize rcar_sysc_area struct sizes

2022-06-13T09:43:50+00:00

Reduce the sizes of the rcar_sysc_area and rcar_gen4_sysc_area structures: - parent is in the range [-1..32] or [-1..64], so s8 is sufficient, - flags needs just 3 bits (for now), so u8 is plenty. This reduces kernel size by: - 288 bytes for an R-Car Gen1+Gen2 kernel (arm32), - 1772 bytes for an R-Car Gen3+Gen4 kernel (arm64). Signed-off-by: Geert Uytterhoeven Tested-by: Wolfram Sang Reviewed-by: Yoshihiro Shimoda Tested-by: Yoshihiro Shimoda Link: https://lore.kernel.org/r/cbbc8f464743d636895c048de61aa610d75392de.1654701156.git.geert+renesas@glider.be

soc: renesas: r8a779a0-sysc: Fix A2DP1 and A2CV[2357] PDR values

2022-06-13T09:43:50+00:00

The PDR values for the A2DP1 and A2CV[2357] power areas on R-Car V3U are incorrect (copied-and-pasted from A2DP0 and A2CV[0146]). Fix them. Reported-by: Renesas Vietnam via Yoshihiro Shimoda Fixes: 1b4298f000064cc2 ("soc: renesas: r8a779a0-sysc: Add r8a779a0 support") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/87bc2e70ba4082970cf8c65871beae4be3503189.1654696188.git.geert+renesas@glider.be

soc: renesas: R-Car V3U is R-Car Gen4

2022-05-05T10:31:22+00:00

Despite the name, R-Car V3U is the first member of the R-Car Gen4 family. Hence reflect this in the SoC Family field. Signed-off-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Link: https://lore.kernel.org/r/2bbecad7b6c24c0d5c1797b3f7f0733d5ba33842.1651497066.git.geert+renesas@glider.be

soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs

2022-04-28T14:47:14+00:00

PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs. Without these configs, the clocks used by the PCI bridge are not enabled and so accessing the devices leads to a kernel crash: Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848 Select PM and PM_GENERIC_DOMAINS for ARCH_RZN1 Signed-off-by: Herve Codina Link: https://lore.kernel.org/r/20220422120850.769480-5-herve.codina@bootlin.com Signed-off-by: Geert Uytterhoeven

soc: renesas: Add RZ/V2M (R9A09G011) config option

2022-04-28T14:46:47+00:00

Add a configuration option for the RZ/V2M SoC. Signed-off-by: Phil Edworthy Link: https://lore.kernel.org/r/20220420204307.87343-1-phil.edworthy@renesas.com Signed-off-by: Geert Uytterhoeven