kernel/linux.git/drivers/soc/qcom/Makefile, branch v5.7.4

soc: qcom: Introduce Protection Domain Restart helpers

2020-03-15T05:38:42+00:00

Qualcomm SoCs (starting with MSM8998) allow for multiple protection domains to run on the same Q6 sub-system. This allows for services like ATH10K WLAN FW to have their own separate address space and crash/recover without disrupting the modem and other PDs running on the same sub-system. The PDR helpers introduces an abstraction that allows for tracking/controlling the life cycle of protection domains running on various Q6 sub-systems. Signed-off-by: Sibi Sankar Link: https://lore.kernel.org/r/20200312120842.21991-2-sibis@codeaurora.org Signed-off-by: Bjorn Andersson

Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm

2019-12-06T18:28:09+00:00

Pull more drm updates from Dave Airlie: "Rob pointed out I missed his pull request for msm-next, it's been in next for a while outside of my tree so shouldn't cause any unexpected issues, it has some OCMEM support in drivers/soc that is acked by other maintainers as it's outside my tree. Otherwise it's a usual fixes pull, i915, amdgpu, the main ones, with some tegra, omap, mgag200 and one core fix. Summary: msm-next: - OCMEM support for a3xx and a4xx GPUs. - a510 support + display support core: - mst payload deletion fix i915: - uapi alignment fix - fix for power usage regression due to security fixes - change default preemption timeout to 640ms from 100ms - EHL voltage level display fixes - TGL DGL PHY fix - gvt - MI_ATOMIC cmd parser fix, CFL non-priv warning - CI spotted deadlock fix - EHL port D programming fix amdgpu: - VRAM lost fixes on BACO for CI/VI - navi14 DC fixes - misc SR-IOV, gfx10 fixes - XGMI fixes for arcturus - SRIOV fixes amdkfd: - KFD on ppc64le enabled - page table optimisations radeon: - fix for r1xx/2xx register checker. tegra: - displayport regression fixes - DMA API regression fixes mgag200: - fix devices that can't scanout except at 0 addr omap: - fix dma_addr refcounting" * tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm: (100 commits) drm/dp_mst: Correct the bug in drm_dp_update_payload_part1() drm/omap: fix dma_addr refcounting drm/tegra: Run hub cleanup on ->remove() drm/tegra: sor: Make the +5V HDMI supply optional drm/tegra: Silence expected errors on IOMMU attach drm/tegra: vic: Export module device table drm/tegra: sor: Implement system suspend/resume drm/tegra: Use proper IOVA address for cursor image drm/tegra: gem: Remove premature import restrictions drm/tegra: gem: Properly pin imported buffers drm/tegra: hub: Remove bogus connection mutex check ia64: agp: Replace empty define with do while agp: Add bridge parameter documentation agp: remove unused variable num_segments agp: move AGPGART_MINOR to include/linux/miscdevice.h agp: remove unused variable size in agp_generic_create_gatt_table drm/dp_mst: Fix build on systems with STACKTRACE_SUPPORT=n drm/radeon: fix r1xx/r2xx register checker for POT textures drm/amdgpu: fix GFX10 missing CSIB set(v3) drm/amdgpu: should stop GFX ring in hw_fini ...

soc: qcom: add OCMEM driver

2019-10-07T15:17:33+00:00

The OCMEM driver handles allocation and configuration of the On Chip MEMory that is present on some Snapdragon SoCs. Devices which have OCMEM do not have GMEM inside the GPU core, so the GPU must instead use OCMEM to be functional. Since the GPU is currently the only OCMEM user with an upstream driver, this is just a minimal implementation sufficient for statically allocating to the GPU it's chunk of OCMEM. This driver currently does not read the gmu-sram node that is described in the device tree bindings. The starting memory address of the GPU's reserved memory region is hardcoded to zero to match what the hardware expects. The driver can be updated to read the reserved memory regions from device tree once other users of OCMEM are added upstream. Signed-off-by: Brian Masney Co-developed-by: Rob Clark Signed-off-by: Rob Clark Reviewed-by: Bjorn Andersson Tested-by: Gabriel Francisco Signed-off-by: Rob Clark

soc: qcom: Rename llcc-slice to llcc-qcom

2019-10-02T04:40:01+00:00

The cleaning up was done without changing the driver file name to ensure a cleaner bisect. Change the file name now to facilitate making the driver generic in subsequent patch. Signed-off-by: Vivek Gautam Signed-off-by: Bjorn Andersson

soc: qcom: llcc cleanup to get rid of sdm845 specific driver file

2019-10-02T04:40:01+00:00

A single file should suffice the need to program the llcc for various platforms. Get rid of sdm845 specific driver file to make way for a more generic driver. Signed-off-by: Vivek Gautam Signed-off-by: Bjorn Andersson

soc: qcom: Add socinfo driver

2019-08-05T21:56:31+00:00

The Qualcomm socinfo driver exposes information about the SoC, its version and its serial number to user space. Tested-by: Vinod Koul Reviewed-by: Vinod Koul Signed-off-by: Imran Khan [Bjorn: Extract code to platform_driver, split patch in multiple] Signed-off-by: Bjorn Andersson [Vaishali: Simplify declarations, introduce qcom_socinfo struct, Fix memory leak, Remove extra code and Misc code refactoring] Signed-off-by: Vaishali Thakkar Signed-off-by: Bjorn Andersson

soc: qcom: Add AOSS QMP driver

2019-06-12T04:52:18+00:00

The Always On Subsystem (AOSS) Qualcomm Messaging Protocol (QMP) driver is used to communicate with the AOSS for certain side-channel requests, that are not available through the RPMh interface. The communication is a very simple synchronous mechanism of messages being written in message RAM and a doorbell in the AOSS is rung. As the AOSS has processed the message length is cleared and an interrupt is fired by the AOSS as acknowledgment. The driver exposes the QDSS clock as a clock and the low-power state associated with the remoteprocs in the system as a set of power-domains. Reviewed-by: Douglas Anderson Reviewed-by: Vinod Koul Tested-by: Sai Prakash Ranjan Signed-off-by: Bjorn Andersson

soc: qcom: rpmhpd: Add RPMh power domain driver

2019-01-22T21:10:15+00:00

The RPMh power domain driver aggregates the corner votes from various consumers for the ARC resources and communicates it to RPMh. With RPMh we use 2 different numbering space for corners, one used by the clients to express their performance needs, and another used to communicate to RPMh hardware. The clients express their performance requirements using a sparse numbering space which are mapped to meaningful levels like RET, SVS, NOMINAL, TURBO etc which then get mapped to another number space between 0 and 15 which is communicated to RPMh. The sparse number space, also referred to as vlvl is mapped to the continuous number space of 0 to 15, also referred to as hlvl, using command DB. Some power domain clients could request a performance state only while the CPU is active, while some others could request for a certain performance state all the time regardless of the state of the CPU. We handle this by internally aggregating the votes from both type of clients and then send the aggregated votes to RPMh. There are also 3 different types of votes that are comunicated to RPMh for every resource. 1. ACTIVE_ONLY: This specifies the requirement for the resource when the CPU is active 2. SLEEP: This specifies the requirement for the resource when the CPU is going to sleep 3. WAKE_ONLY: This specifies the requirement for the resource when the CPU is coming out of sleep to active state We add data for all power domains on sdm845 SoC as part of the patch. The driver can be extended to support other SoCs which support RPMh Reviewed-by: Ulf Hansson Reviewed-by: Stephen Boyd Signed-off-by: Rajendra Nayak Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross

soc: qcom: rpmpd: Add a Power domain driver to model corners

2019-01-22T21:06:13+00:00

The Power domains for corners just pass the performance state set by the consumers to the RPM (Remote Power manager) which then takes care of setting the appropriate voltage on the corresponding rails to meet the performance needs. We add all power domain data needed on msm8996 here. This driver can easily be extended by adding data for other qualcomm SoCs as well. Reviewed-by: Ulf Hansson Acked-by: Rob Herring Reviewed-by: Stephen Boyd Signed-off-by: Rajendra Nayak Signed-off-by: Viresh Kumar Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross

drivers: qcom: rpmh: add RPMH helper functions

2018-07-21T18:32:40+00:00

Sending RPMH requests and waiting for response from the controller through a callback is common functionality across all platform drivers. To simplify drivers, add a library functions to create RPMH client and send resource state requests. rpmh_write() is a synchronous blocking call that can be used to send active state requests. Signed-off-by: Lina Iyer Signed-off-by: Raju P.L.S.S.S.N Signed-off-by: Andy Gross