<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/linux.git/drivers/soc/qcom/Makefile, branch linux-4.20.y</title>
<subtitle>Linux kernel stable tree (mirror)</subtitle>
<id>https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.20.y</id>
<link rel='self' href='https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.20.y'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/'/>
<updated>2018-07-21T18:32:40+00:00</updated>
<entry>
<title>drivers: qcom: rpmh: add RPMH helper functions</title>
<updated>2018-07-21T18:32:40+00:00</updated>
<author>
<name>Lina Iyer</name>
<email>ilina@codeaurora.org</email>
</author>
<published>2018-06-20T13:27:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=c1038456b02b86cc4445441a8d33c5aca0ac103e'/>
<id>urn:sha1:c1038456b02b86cc4445441a8d33c5aca0ac103e</id>
<content type='text'>
Sending RPMH requests and waiting for response from the controller
through a callback is common functionality across all platform drivers.
To simplify drivers, add a library functions to create RPMH client and
send resource state requests.

rpmh_write() is a synchronous blocking call that can be used to send
active state requests.

Signed-off-by: Lina Iyer &lt;ilina@codeaurora.org&gt;
Signed-off-by: Raju P.L.S.S.S.N &lt;rplsssn@codeaurora.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers: qcom: rpmh-rsc: log RPMH requests in FTRACE</title>
<updated>2018-07-21T18:32:31+00:00</updated>
<author>
<name>Lina Iyer</name>
<email>ilina@codeaurora.org</email>
</author>
<published>2018-06-20T13:27:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=fc087fe5a45e7210be89fe015505e1bb3746395c'/>
<id>urn:sha1:fc087fe5a45e7210be89fe015505e1bb3746395c</id>
<content type='text'>
Log sent RPMH requests and interrupt responses in FTRACE.

Signed-off-by: Lina Iyer &lt;ilina@codeaurora.org&gt;
Reviewed-by: Steven Rostedt (VMware) &lt;rostedt@goodmis.org&gt;
[rplsssn@codeaurora.org: rebase to v4.18-rc1 &amp; fix merge conflict]
Signed-off-by: Raju P.L.S.S.S.N &lt;rplsssn@codeaurora.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers: qcom: rpmh-rsc: add RPMH controller for QCOM SoCs</title>
<updated>2018-07-21T18:32:06+00:00</updated>
<author>
<name>Lina Iyer</name>
<email>ilina@codeaurora.org</email>
</author>
<published>2018-06-20T13:26:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=658628e7ef78e875cfe13064387c1a7a287d6338'/>
<id>urn:sha1:658628e7ef78e875cfe13064387c1a7a287d6338</id>
<content type='text'>
Add controller driver for QCOM SoCs that have hardware based shared
resource management. The hardware IP known as RSC (Resource State
Coordinator) houses multiple Direct Resource Voter (DRV) for different
execution levels. A DRV is a unique voter on the state of a shared
resource. A Trigger Control Set (TCS) is a bunch of slots that can house
multiple resource state requests, that when triggered will issue those
requests through an internal bus to the Resource Power Manager Hardened
(RPMH) blocks. These hardware blocks are capable of adjusting clocks,
voltages, etc. The resource state request from a DRV are aggregated
along with state requests from other processors in the SoC and the
aggregate value is applied on the resource.

Some important aspects of the RPMH communication -
- Requests are &lt;addr, value&gt; with some header information
- Multiple requests (upto 16) may be sent through a TCS, at a time
- Requests in a TCS are sent in sequence
- Requests may be fire-n-forget or completion (response expected)
- Multiple TCS from the same DRV may be triggered simultaneously
- Cannot send a request if another request for the same addr is in
  progress from the same DRV
- When all the requests from a TCS are complete, an IRQ is raised
- The IRQ handler needs to clear the TCS before it is available for
  reuse
- TCS configuration is specific to a DRV
- Platform drivers may use DRV from different RSCs to make requests

Resource state requests made when CPUs are active are called 'active'
state requests. Requests made when all the CPUs are powered down (idle
state) are called 'sleep' state requests. They are matched by a
corresponding 'wake' state requests which puts the resources back in to
previously requested active state before resuming any CPU. TCSes are
dedicated for each type of requests. Active mode TCSes (AMC) are used to
send requests immediately to the resource, while control TCS are used to
provide specific information to the controller. Sleep and Wake TCS send
sleep and wake requests, after and before the system halt respectively.

Signed-off-by: Lina Iyer &lt;ilina@codeaurora.org&gt;
Signed-off-by: Raju P.L.S.S.S.N &lt;rplsssn@codeaurora.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers: soc: Add LLCC driver</title>
<updated>2018-07-21T18:31:35+00:00</updated>
<author>
<name>Rishabh Bhatnagar</name>
<email>rishabhb@codeaurora.org</email>
</author>
<published>2018-05-24T00:35:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=a3134fb09e0bc5bee76e13bf863173b86f21cf87'/>
<id>urn:sha1:a3134fb09e0bc5bee76e13bf863173b86f21cf87</id>
<content type='text'>
LLCC (Last Level Cache Controller) provides additional cache memory
in the system. LLCC is partitioned into multiple slices and each
slice gets its own priority, size, ID and other config parameters.
LLCC driver programs these parameters for each slice. Clients that
are assigned to use LLCC need to get information such size &amp; ID of the
slice they get and activate or deactivate the slice as needed. LLCC driver
provides API for the clients to perform these operations.

Signed-off-by: Channagoud Kadabi &lt;ckadabi@codeaurora.org&gt;
Signed-off-by: Rishabh Bhatnagar &lt;rishabhb@codeaurora.org&gt;
Reviewed-by: Evan Green &lt;evgreen@chromium.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2018-06-12T01:19:45+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-06-12T01:19:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=8efcf34a263965e471e3999904f94d1f6799d42a'/>
<id>urn:sha1:8efcf34a263965e471e3999904f94d1f6799d42a</id>
<content type='text'>
Pull ARM SoC late updates from Olof Johansson:
 "This is a branch with a few merge requests that either came in late,
  or took a while longer for us to review and merge than usual and thus
  cut it a bit close to the merge window. We stage them in a separate
  branch and if things look good, we still send them up -- and that's
  the case here.

  This is mostly DT additions for Renesas platforms, adding IP block
  descriptions for existing and new SoCs.

  There are also some driver updates for Qualcomm platforms for SMEM/QMI
  and GENI, which is their generalized serial protocol interface"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (186 commits)
  soc: qcom: smem: introduce qcom_smem_virt_to_phys()
  soc: qcom: qmi: fix a buffer sizing bug
  MAINTAINERS: Update pattern for qcom_scm
  soc: Unconditionally include qcom Makefile
  soc: qcom: smem: check sooner in qcom_smem_set_global_partition()
  soc: qcom: smem: fix qcom_smem_set_global_partition()
  soc: qcom: smem: fix off-by-one error in qcom_smem_alloc_private()
  soc: qcom: smem: byte swap values properly
  soc: qcom: smem: return proper type for cached entry functions
  soc: qcom: smem: fix first cache entry calculation
  soc: qcom: cmd-db: Make endian-agnostic
  drivers: qcom: add command DB driver
  arm64: dts: renesas: salvator-common: Add ADV7482 support
  ARM: dts: r8a7740: Add CEU1
  ARM: dts: r8a7740: Add CEU0
  arm64: dts: renesas: salvator-common: enable VIN
  arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
  arm64: dts: renesas: r8a7795-es1: add CSI-2 node
  ...
</content>
</entry>
<entry>
<title>drivers: qcom: add command DB driver</title>
<updated>2018-05-25T20:53:52+00:00</updated>
<author>
<name>Mahesh Sivasubramanian</name>
<email>msivasub@codeaurora.org</email>
</author>
<published>2018-04-10T17:57:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=312416d9171a1460b7ed8d182b5b540c910ce80d'/>
<id>urn:sha1:312416d9171a1460b7ed8d182b5b540c910ce80d</id>
<content type='text'>
Command DB is a simple database in the shared memory of QCOM SoCs, that
provides information regarding shared resources. Some shared resources
in the SoC have properties that are probed dynamically at boot by the
remote processor. The information pertaining to the SoC and the platform
are made available in the shared memory. Drivers can query this
information using predefined strings.

Signed-off-by: Mahesh Sivasubramanian &lt;msivasub@codeaurora.org&gt;
Signed-off-by: Lina Iyer &lt;ilina@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;swboyd@chromium.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: Add APR bus driver</title>
<updated>2018-05-11T03:13:26+00:00</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2018-05-09T12:56:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=6adba21eb434d8160da05507c564c2339f4afdda'/>
<id>urn:sha1:6adba21eb434d8160da05507c564c2339f4afdda</id>
<content type='text'>
This patch adds support to APR bus (Asynchronous Packet Router) driver.
APR driver is made as a bus driver so that the apr devices can added removed
more dynamically depending on the state of the services on the dsp.
APR is used for communication between application processor and QDSP to
use services on QDSP like Audio and others.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Reviewed-and-tested-by: Rohit kumar &lt;rohitkr@codeaurora.org&gt;
Acked-by: Andy Gross &lt;andy.gross@linaro.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: Add GENI based QUP Wrapper driver</title>
<updated>2018-04-25T05:12:05+00:00</updated>
<author>
<name>Karthikeyan Ramasubramanian</name>
<email>kramasub@codeaurora.org</email>
</author>
<published>2018-03-30T17:08:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=eddac5af06546d2e7a0730e3dc02dde3dc91098a'/>
<id>urn:sha1:eddac5af06546d2e7a0730e3dc02dde3dc91098a</id>
<content type='text'>
This driver manages the Generic Interface (GENI) firmware based Qualcomm
Universal Peripheral (QUP) Wrapper. GENI based QUP is the next generation
programmable module composed of multiple Serial Engines (SE) and supports
a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. This
driver also enables managing the serial interface independent aspects of
Serial Engines.

Signed-off-by: Karthikeyan Ramasubramanian &lt;kramasub@codeaurora.org&gt;
Signed-off-by: Sagar Dharia &lt;sdharia@codeaurora.org&gt;
Signed-off-by: Girish Mahadevan &lt;girishm@codeaurora.org&gt;
Reviewed-by: Evan Green &lt;evgreen@chromium.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: Introduce QMI helpers</title>
<updated>2017-12-20T21:38:34+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2017-12-05T17:43:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=3830d0771ef66a3bb9ab57b70630b3598593a4f0'/>
<id>urn:sha1:3830d0771ef66a3bb9ab57b70630b3598593a4f0</id>
<content type='text'>
Drivers that needs to communicate with a remote QMI service all has to
perform the operations of discovering the service, encoding and decoding
the messages and operate the socket. This introduces an abstraction for
these common operations, reducing most of the duplication in such cases.

Acked-by: Chris Lew &lt;clew@codeaurora.org&gt;
Tested-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>soc: qcom: Introduce QMI encoder/decoder</title>
<updated>2017-12-20T21:38:34+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2017-12-05T17:43:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/kernel/linux.git/commit/?id=9b8a11e82615274d4133aab3cf5aa1c59191f0a2'/>
<id>urn:sha1:9b8a11e82615274d4133aab3cf5aa1c59191f0a2</id>
<content type='text'>
Add the helper library for encoding and decoding QMI encoded messages.
The implementation is taken from lib/qmi_encdec.c of the Qualcomm kernel
(msm-3.18).

Modifications has been made to the public API, source buffers has been
made const and the debug-logging part was omitted, for now.

Acked-by: Chris Lew &lt;clew@codeaurora.org&gt;
Tested-by: Chris Lew &lt;clew@codeaurora.org&gt;
Tested-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
</feed>
