kernel/linux.git/drivers/soc/Makefile, branch v6.19.11

Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers

2025-05-21T17:25:08+00:00

RISC-V SoC for v6.16 Sophgo: Add support for SG2044 TOP syscon device. The SG2044 TOP device provide PLL clock function in its area. Add RTC support for CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Chen Wang * tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux: soc: sophgo: cv1800: rtcsys: New driver (handling RTC only) dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series soc: sophgo: sg2044: Add support for SG2044 TOP syscon device Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann

soc: sophgo: sg2044: Add support for SG2044 TOP syscon device

2025-05-06T23:48:34+00:00

The SG2044 TOP device provide PLL clock function in its area. Add a mfd definition for it. Link: https://lore.kernel.org/r/20250418020325.421257-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang

soc: Add VIA/WonderMedia SoC identification driver

2025-05-04T17:27:01+00:00

Add a small SOC bus driver to parse the chip ID and revision made available on VIA/WonderMedia SoCs via their system configuration controller's SCC_ID register. This is intended to select appropriate sets of on-chip device quirks at runtime, as it has been found that even within the same SoC version there can be register-incompatible differences, such as with the SDMMC controller on WM8505 rev. A0-A1 vs. rev. A2. The list of SoC versions is compiled from various vendor source dumps and not all of them have corresponding mainline driver support. Some of them also have been seen with varying on-chip markings while sharing the same hardware chip ID's (as is the case with e.g. WM8850 vs. WM8950). In such cases the selection of names to use here among those seen in various source dumps and chip markings was arbitrary. Suggested by Krzysztof at [1] - thanks a lot! [1] https://lore.kernel.org/all/14de236b-e2a7-4bde-986d-1e5ffddd01b4@kernel.org/ Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-2-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski

Merge tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2024-09-26T19:00:25+00:00

Pull SoC update from Arnd Bergmann: "Convert ep93xx to devicetree This concludes a long journey towards replacing the old board files with devictree description on the Cirrus Logic EP93xx platform. Nikita Shubin has been working on this for a long time, for details see the last post on https://lore.kernel.org/lkml/20240909-ep93xx-v12-0-e86ab2423d4b@maquefel.me/" * tag 'soc-ep93xx-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) dt-bindings: gpio: ep9301: Add missing "#interrupt-cells" to examples MAINTAINERS: Update EP93XX ARM ARCHITECTURE maintainer soc: ep93xx: drop reference to removed EP93XX_SOC_COMMON config net: cirrus: use u8 for addr to calm down sparse dmaengine: cirrus: use snprintf() to calm down gcc 13.3.0 dmaengine: ep93xx: Fix a NULL vs IS_ERR() check in probe() pinctrl: ep93xx: Fix raster pins typo spi: ep93xx: update kerneldoc comments for ep93xx_spi clk: ep93xx: Fix off by one in ep93xx_div_recalc_rate() clk: ep93xx: add module license dmaengine: cirrus: remove platform code ASoC: cirrus: edb93xx: Delete driver ARM: ep93xx: soc: drop defines ARM: ep93xx: delete all boardfiles ata: pata_ep93xx: remove legacy pinctrl use pwm: ep93xx: drop legacy pinctrl ARM: ep93xx: DT for the Cirrus ep93xx SoC platforms ARM: dts: ep93xx: Add EDB9302 DT ARM: dts: ep93xx: add ts7250 board ARM: dts: add Cirrus EP93XX SoC .dtsi ...

soc: Add SoC driver for Cirrus ep93xx

2024-09-12T14:33:10+00:00

Add an SoC driver for the ep93xx. Currently there is only one thing not fitting into any other framework, and that is the swlock setting. Used for clock settings, pinctrl and restart. Signed-off-by: Nikita Shubin Tested-by: Alexander Sverdlin Reviewed-by: Linus Walleij Acked-by: Alexander Sverdlin Acked-by: Vinod Koul Signed-off-by: Arnd Bergmann

soc: versatile: enable compile testing

2024-08-30T13:40:11+00:00

Enable compile testing for broader build coverage. None of the drivers use anything from "asm", so code should build everywhere. CONFIG_PLAT_VERSATILE is being selected by driver dependencies (CONFIG_ARCH_INTEGRATOR and CONFIG_ARCH_REALVIEW), so directory can be always added to Makefile targets without impacting other configurations. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/20240825-soc-dev-fixes-v1-4-ff4b35abed83@linaro.org Signed-off-by: Linus Walleij

soc: canaan: Deprecate SOC_CANAAN and use SOC_CANAAN_K210 for K210

2024-04-05T15:42:50+00:00

Since SOC_FOO should be deprecated from patch [1], and cleanup for other SoCs is already in the mailing list [2,3,4], we remove the use of SOC_CANAAN and use ARCH_CANAAN for SoCs vendored by Canaan instead from now on. Thus, we should also change the Makefile here to use ARCH_CANAAN. Then, since we have introduced SOC_CANAAN_K210 for K210-specific drivers, we should replace its drivers depends on SOC_CANAAN_K210 and default select when it has the symbol SOC_CANAAN_K210. [1] https://lore.kernel.org/linux-riscv/20221121221414.109965-1-conor@kernel.org/ [2] https://lore.kernel.org/linux-riscv/20240305-praying-clad-c4fbcaa7ed0a@spud/ [3] https://lore.kernel.org/linux-riscv/20240305-fled-undrilled-41dc0c46bb29@spud/ [4] https://lore.kernel.org/linux-riscv/20240305-stress-earflap-d7ddb8655a4d@spud/ Signed-off-by: Yangyu Chen Acked-by: Guo Ren Signed-off-by: Conor Dooley

soc: sifive: shunt ccache driver to drivers/cache

2023-11-22T11:49:25+00:00

Move the ccache driver over to drivers/cache, out of the drivers/soc dumping ground, to this new collection point for cache controller drivers. Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Conor Dooley

Merge tag 'hisi-drivers-for-6.6' of https://github.com/hisilicon/linux-hisi into soc/drivers

2023-08-12T10:10:46+00:00

HiSilicon driver updates for v6.6 - Add HCCS driver for HiSilicon Kunpeng SoC and document the sysfs description * tag 'hisi-drivers-for-6.6' of https://github.com/hisilicon/linux-hisi: doc: soc: hisilicon: Add Kunpeng HCCS driver documentation soc: hisilicon: add sysfs entry to query information of HCCS soc: hisilicon: Support HCCS driver on Kunpeng SoC Link: https://lore.kernel.org/r/64D605DE.2070303@hisilicon.com Signed-off-by: Arnd Bergmann

soc: hisilicon: Support HCCS driver on Kunpeng SoC

2023-08-08T12:36:29+00:00

The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection bus protocol. This driver is aimed to support some features about HCCS on Kunpeng SoC, like, querying the health status of HCCS. This patch adds the probing of HCCS driver, and obtains all HCCS port information by the dimension of chip and die on platform. Signed-off-by: Huisong Li Signed-off-by: Wei Xu