kernel/linux.git/drivers/soc/Kconfig, branch v6.18.21

Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers

2025-05-21T17:25:08+00:00

RISC-V SoC for v6.16 Sophgo: Add support for SG2044 TOP syscon device. The SG2044 TOP device provide PLL clock function in its area. Add RTC support for CV1800 series SoC. The device is called RTC, but contains control registers of other HW blocks in its address space, most notably of Power-on-Reset (PoR) module, DW8051 IP (MCU core), accompanying SRAM, hence putting it in SoC subsystem. Signed-off-by: Chen Wang * tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux: soc: sophgo: cv1800: rtcsys: New driver (handling RTC only) dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series soc: sophgo: sg2044: Add support for SG2044 TOP syscon device Link: https://lore.kernel.org/r/MA0P287MB2262B041A26A0F5EAD1E296CFE91A@MA0P287MB2262.INDP287.PROD.OUTLOOK.COM Signed-off-by: Arnd Bergmann

soc: sophgo: sg2044: Add support for SG2044 TOP syscon device

2025-05-06T23:48:34+00:00

The SG2044 TOP device provide PLL clock function in its area. Add a mfd definition for it. Link: https://lore.kernel.org/r/20250418020325.421257-3-inochiama@gmail.com Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang Signed-off-by: Chen Wang

soc: Add VIA/WonderMedia SoC identification driver

2025-05-04T17:27:01+00:00

Add a small SOC bus driver to parse the chip ID and revision made available on VIA/WonderMedia SoCs via their system configuration controller's SCC_ID register. This is intended to select appropriate sets of on-chip device quirks at runtime, as it has been found that even within the same SoC version there can be register-incompatible differences, such as with the SDMMC controller on WM8505 rev. A0-A1 vs. rev. A2. The list of SoC versions is compiled from various vendor source dumps and not all of them have corresponding mainline driver support. Some of them also have been seen with varying on-chip markings while sharing the same hardware chip ID's (as is the case with e.g. WM8850 vs. WM8950). In such cases the selection of names to use here among those seen in various source dumps and chip markings was arbitrary. Suggested by Krzysztof at [1] - thanks a lot! [1] https://lore.kernel.org/all/14de236b-e2a7-4bde-986d-1e5ffddd01b4@kernel.org/ Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250503-wmt-soc-driver-v3-2-2daa9056fa10@gmail.com Signed-off-by: Krzysztof Kozlowski

soc: Add SoC driver for Cirrus ep93xx

2024-09-12T14:33:10+00:00

Add an SoC driver for the ep93xx. Currently there is only one thing not fitting into any other framework, and that is the swlock setting. Used for clock settings, pinctrl and restart. Signed-off-by: Nikita Shubin Tested-by: Alexander Sverdlin Reviewed-by: Linus Walleij Acked-by: Alexander Sverdlin Acked-by: Vinod Koul Signed-off-by: Arnd Bergmann

soc: sifive: shunt ccache driver to drivers/cache

2023-11-22T11:49:25+00:00

Move the ccache driver over to drivers/cache, out of the drivers/soc dumping ground, to this new collection point for cache controller drivers. Reviewed-by: Samuel Holland Tested-by: Samuel Holland Signed-off-by: Conor Dooley

pmdomain: starfive: Move Kconfig file to the pmdomain subsystem

2023-10-04T21:41:56+00:00

The Kconfig belongs closer to the corresponding implementation, hence let's move it from the soc subsystem to the pmdomain subsystem. Cc: Walker Chen Cc: Conor Dooley Acked-by: Conor Dooley Signed-off-by: Ulf Hansson

pmdomain: actions: Move Kconfig file to the pmdomain subsystem

2023-09-20T08:07:52+00:00

The Kconfig belongs closer to the corresponding implementation, hence let's move it from the soc subsystem to the pmdomain subsystem. Cc: "Andreas Färber" Cc: Manivannan Sadhasivam Cc: Signed-off-by: Ulf Hansson

soc: hisilicon: Support HCCS driver on Kunpeng SoC

2023-08-08T12:36:29+00:00

The Huawei Cache Coherence System (HCCS) is a multi-chip interconnection bus protocol. This driver is aimed to support some features about HCCS on Kunpeng SoC, like, querying the health status of HCCS. This patch adds the probing of HCCS driver, and obtains all HCCS port information by the dimension of chip and die on platform. Signed-off-by: Huisong Li Signed-off-by: Wei Xu

soc: nuvoton: Add SoC info driver for WPCM450

2023-02-01T16:11:36+00:00

Add a SoC information driver for Nuvoton WPCM450 SoCs. It provides information such as the SoC revision. Usage example: # grep . /sys/devices/soc0/* /sys/devices/soc0/family:Nuvoton NPCM /sys/devices/soc0/revision:A3 /sys/devices/soc0/soc_id:WPCM450 Signed-off-by: Jonathan Neuschäfer Reviewed-by: Joel Stanley Reviewed-by: Paul Menzel Link: https://lore.kernel.org/r/20221031223926.241641-1-j.neuschaefer@gmx.net Signed-off-by: Joel Stanley Link: https://lore.kernel.org/r/20230201051717.1005938-1-joel@jms.id.au Signed-off-by: Arnd Bergmann

soc: starfive: Add StarFive JH71XX pmu driver

2023-01-20T21:55:59+00:00

Add pmu driver for the StarFive JH71XX SoC. As the power domains provider, the Power Management Unit (PMU) is designed for including multiple PM domains that can be used for power gating of selected IP blocks for power saving by reduced leakage current. It accepts software encourage command to switch the power mode of SoC. Signed-off-by: Walker Chen Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner Signed-off-by: Conor Dooley