kernel/linux.git/drivers/pwm, branch v4.19.39

pwm: mediatek: Add MT7628 support

2018-08-20T09:36:07+00:00

Add support for MT7628. The SoC is legacy MIPS and hence has no complex clock tree. This patch add an extra flag to the SoC specific data indicating, that no clocks are present. Signed-off-by: John Crispin Reviewed-by: Matthias Brugger Signed-off-by: Thierry Reding

pwm: meson: Fix mux clock names

2018-08-20T09:32:25+00:00

Current clock name looks like this: /soc/bus@ffd00000/pwm@1b000#mux0 This is bad because CCF uses the clock to create a directory in clk debugfs. With such name, the directory creation (silently) fails and the debugfs entry end up being created at the debugfs root. With this change, the clock name will now be: ffd1b000.pwm#mux0 This matches the clock naming scheme used in the ethernet and mmc driver. It also fixes the problem with debugfs. Fixes: 36af66a79056 ("pwm: Convert to using %pOF instead of full_name") Signed-off-by: Jerome Brunet Acked-by: Neil Armstrong Signed-off-by: Thierry Reding

pwm: stm32-lp: Remove useless loop in stm32_pwm_lp_remove()

2018-08-20T09:32:25+00:00

LPTimer has only one pwm channel (npwm = 1). Remove useless for loop in remove routine. Signed-off-by: Fabrice Gasnier Signed-off-by: Thierry Reding

pwm: omap-dmtimer: Return -EPROBE_DEFER if no dmtimer platform data

2018-08-20T09:32:19+00:00

If a pwm-omap-dmtimer is probed before the dmtimer it uses, the platform data won't be set yet. Fixes: ac30751df953 ("ARM: OMAP: pdata-quirks: Remove unused timer pdata") Cc: # 4.17+ Signed-off-by: David Rivshin Acked-by: Pavel Machek Tested-by: Pavel Machek Acked-by: Ladislav Michl Tested-by: Andreas Kemnade Signed-off-by: Thierry Reding

pwm: mxs: Switch to SPDX identifier

2018-07-12T07:03:06+00:00

Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam Signed-off-by: Thierry Reding

pwm: fsl-ftm: Enable support for the new SoC i.MX8QM

2018-07-09T17:08:26+00:00

Enabled the support for the new SoC i.MX8QM by adding the compatible string of "fsl,imx8qm-ftm-pwm" and its per-compatible data with setting "has_enable_bits" to "true". Signed-off-by: Shenwei Wang Signed-off-by: Thierry Reding

pwm: fsl-ftm: Added the support of per-compatible data

2018-07-09T17:06:21+00:00

On the i.MX8x SoC family, an additional PWM enable bit is added for each PWM channel in the register FTM_SC[23:16]. It supports 8 channels. Bit 16 is for channel 0, and bit 23 is for channel 7. As the IP version information can not be obtained via any of the FTM registers, a property of "has_enable_bits" is added via per-compatible data structure. Signed-off-by: Shenwei Wang Signed-off-by: Thierry Reding

pwm: fsl-ftm: Added a dedicated IP interface clock

2018-07-09T17:04:19+00:00

The current driver assumes that the ftm_sys clock works as one of the clock sources for the IP block as well as the IP interface clock. This assumption does not apply any more on the latest i.MX8x SoC family. On i.MX8x SoCs, a dedicated IP interface clock is introduced and it must be enabled before accessing any FTM registers. Moreover, the clock can not be used as the source clock for the FTM IP block. This patch introduces the ipg_clk as the dedicated IP interface clock and by default it is the same as the ftm_sys clock if not specified. Signed-off-by: Shenwei Wang Signed-off-by: Thierry Reding

pwm: cros-ec: Switch to SPDX identifier

2018-07-09T17:02:23+00:00

Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Thierry Reding

pwm: imx: Switch to SPDX identifier

2018-07-09T16:59:14+00:00

Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam Signed-off-by: Thierry Reding