Linux kernel stable tree (mirror) https://git.radix-linux.su/kernel/linux.git/atom?h=linux-4.16.y 2017-09-11T20:04:32+00:00 2017-09-11T20:04:32+00:00 Linus Torvalds torvalds@linux-foundation.org 2017-09-11T20:04:32+00:00 urn:sha1:66c9457df3926efff65529dab1a8c742df756790 Pull pwm updates from Thierry Reding: "The changes for this release include a new driver for the PWM controller found on SoCs of the ZTX ZX family. Support for an old SH-Mobile SoC has been dropped and the Rockchip and MediaTek drivers gain support for more generations. Other than that there are a bunch of coding style fixes, minor bug fixes and cleanup as well as documentation patches" * tag 'pwm/for-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (32 commits) pwm: pwm-samsung: fix suspend/resume support pwm: samsung: Remove redundant checks from pwm_samsung_config() pwm: mediatek: Disable clock on PWM configuration failure dt-bindings: pwm: Add MT2712/MT7622 information pwm: mediatek: Fix clock control issue pwm: mediatek: Fix PWM source clock selection pwm: mediatek: Fix Kconfig description pwm: tegra: Explicitly request exclusive reset control pwm: hibvt: Explicitly request exclusive reset control pwm: tiehrpwm: Set driver data before runtime PM enable pwm: tiehrpwm: Miscellaneous coding style fixups pwm: tiecap: Set driver data before runtime PM enable pwm: tiecap: Miscellaneous coding style fixups dt-bindings: pwm: tiecap: Add TI 66AK2G SoC specific compatible pwm: tiehrpwm: fix clock imbalance in probe error path pwm: tiehrpwm: Fix runtime PM imbalance at unbind pwm: Kconfig: Enable pwm-tiecap to be built for Keystone pwm: Add ZTE ZX PWM device driver dt-bindings: pwm: Add bindings doc for ZTE ZX PWM controller pwm: bcm2835: Support for polarity setting via DT ... 2017-09-04T13:49:09+00:00 Fabrice Gasnier fabrice.gasnier@st.com 2017-08-28T10:04:09+00:00 urn:sha1:e70a540b4e023045a85529edbd04da73a0c72a12 Add support for single PWM channel on Low-Power Timer, that can be found on some STM32 platforms. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> 2017-08-21T08:39:08+00:00 Zhi Mao zhi.mao@mediatek.com 2017-06-30T06:05:16+00:00 urn:sha1:aa12d7a7a978ac5f3202cac8f2f671fd267bf5e3 Fix a copy/paste error that sneaked into the Kconfig description of the Mediatek PWM driver. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2017-08-21T06:11:24+00:00 Vignesh R vigneshr@ti.com 2017-08-02T06:13:44+00:00 urn:sha1:cd9b53daafaa635219b46a79f00177ddd3081e4f 66AK2G SoC has ECAP subsystem that is used as pwm-backlight provider for display. Hence, enable pwm-tiecap driver to be built for Keystone architecture. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2017-08-21T06:11:24+00:00 Shawn Guo shawn.guo@linaro.org 2017-07-27T08:23:37+00:00 urn:sha1:4836193c435c95443fdebb6b9d4a58032999dbb3 It adds PWM device driver for ZTE ZX family SoCs. The PWM controller supports 4 devices with polarity configuration. The driver has been tested with pwm-regulator support to scale core voltage via cpufreq. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2017-04-06T15:45:04+00:00 John Crispin john@phrozen.org 2017-01-23T18:34:37+00:00 urn:sha1:caf065f8fd583b43a3f95d84c8a0a0d07597963b This patch adds support for the PWM core found on current ARM base SoCs made by MediaTek. This IP core supports 5 channels and has 2 operational modes. There is the old mode, which is a classical PWM and the new mode which allows the user to define bitmasks that get clocked out on the pins. As the subsystem currently only supports PWM cores with the "old" mode, we can safely ignore the "new" mode for now. Signed-off-by: John Crispin <john@phrozen.org> [thierry.reding@gmail.com: minor cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2017-03-01T17:46:02+00:00 Linus Torvalds torvalds@linux-foundation.org 2017-03-01T17:46:02+00:00 urn:sha1:545b2820c4a48245412d97030134cc1d38918726 Pull pwm updates from Thierry Reding: "This set contains mostly fixes to existing drivers as well as cleanup of code that's not been in active use for a while" * tag 'pwm/for-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (27 commits) acpi: lpss: call pwm_add_table() for BSW PWM device pwm: Try to load modules during pwm_get() pwm: Don't hold pwm_lookup_lock longer than necessary pwm: Make the PWM_POLARITY flag in DTB optional pwm: Print error messages with pr_err() instead of pr_debug() pwm: imx: Add polarity inversion support to i.MX's PWMv2 pwm: imx: doc: Update imx-pwm.txt documentation entry pwm: imx: Remove redundant i.MX PWMv2 code pwm: imx: Provide atomic PWM support for i.MX PWMv2 pwm: imx: Move PWMv2 wait for fifo slot code to a separate function pwm: imx: Move PWMv2 software reset code to a separate function pwm: imx: Rewrite v1 code to facilitate switch to atomic PWM pwm: imx: Add separate set of PWM ops for v1 and v2 pwm: imx: Remove ipg clock and enable per clock when required pwm: lpss: Add Intel Gemini Lake PCI ID pwm: lpss: Do not export board infos for different PWM types pwm: lpss: Avoid reconfiguring while UPDATE bit is still enabled pwm: lpss: Switch to new atomic API pwm: lpss: Allow duty cycle to be 0 pwm: lpss: Avoid potential overflow of base_unit ... 2017-01-25T16:11:55+00:00 Benjamin Gaignard benjamin.gaignard@linaro.org 2017-01-20T09:15:05+00:00 urn:sha1:7edf7369205baa158b08dea9efa2764bee41ab03 This driver adds support for PWM driver on STM32 platform. The SoC have multiple instances of the hardware IP and each of them could have small differences: number of channels, complementary output, auto reload register size... version 9: - fix commit message header - remove one space MODULE_ALIAS version 8: - fix comments done by Thierry on version 7 version 6: - change st,breakinput parameter to make it usuable for stm32f7 too. version 4: - detect at probe time hardware capabilities - fix comments done on v2 and v3 - use PWM atomic ops version 2: - only keep one comptatible - use DT parameters to discover hardware block configuration Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> 2017-01-18T23:38:17+00:00 Scott Branden scott.branden@broadcom.com 2016-10-08T20:54:05+00:00 urn:sha1:5bf22ff32e736beb8ba91a99a3e116d12e7eabd0 Add dependency on COMMON_CLK and allow COMPILE_TEST for broader compile coverage. Default to Y for IPROC SoCs. This allows the driver to simply be enabled by selecting PWM. Signed-off-by: Scott Branden <scott.branden@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> [thierry.reding@gmail.com: reword commit message] Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2016-11-29T15:50:12+00:00 yuanjian yuanjian12@hisilicon.com 2016-11-28T09:42:46+00:00 urn:sha1:d09f00810850dd6e6eac8895b62bc3fc35435431 Add PWM driver for the PWM controller found on HiSilicon BVT SoCs such as Hi3519V100, Hi3516CV300, etc. The PWM controller is primarily in charge of controlling the P-Iris lens. Reviewed-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Jian Yuan <yuanjian12@hisilicon.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>