kernel/linux.git/drivers/powercap/intel_rapl.c, branch v4.9.331

powercap: intel_rapl: fix UBSAN shift-out-of-bounds issue

2022-10-26T11:15:45+00:00

[ Upstream commit 2d93540014387d1c73b9ccc4d7895320df66d01b ] When value < time_unit, the parameter of ilog2() will be zero and the return value is -1. u64(-1) is too large for shift exponent and then will trigger shift-out-of-bounds: shift exponent 18446744073709551615 is too large for 32-bit type 'int' Call Trace: rapl_compute_time_window_core rapl_write_data_raw set_time_window store_constraint_time_window_us Signed-off-by: Chao Qin Acked-by: Zhang Rui Signed-off-by: Rafael J. Wysocki Signed-off-by: Sasha Levin

x86/cpu: Sanitize FAM6_ATOM naming

2019-05-14T17:19:34+00:00

commit f2c4db1bd80720cd8cb2a5aa220d9bc9f374f04e upstream. Going primarily by: https://en.wikipedia.org/wiki/List_of_Intel_Atom_microprocessors with additional information gleaned from other related pages; notably: - Bonnell shrink was called Saltwell - Moorefield is the Merriefield refresh which makes it Airmont The general naming scheme is: FAM6_ATOM_UARCH_SOCTYPE for i in `git grep -l FAM6_ATOM` ; do sed -i -e 's/ATOM_PINEVIEW/ATOM_BONNELL/g' \ -e 's/ATOM_LINCROFT/ATOM_BONNELL_MID/' \ -e 's/ATOM_PENWELL/ATOM_SALTWELL_MID/g' \ -e 's/ATOM_CLOVERVIEW/ATOM_SALTWELL_TABLET/g' \ -e 's/ATOM_CEDARVIEW/ATOM_SALTWELL/g' \ -e 's/ATOM_SILVERMONT1/ATOM_SILVERMONT/g' \ -e 's/ATOM_SILVERMONT2/ATOM_SILVERMONT_X/g' \ -e 's/ATOM_MERRIFIELD/ATOM_SILVERMONT_MID/g' \ -e 's/ATOM_MOOREFIELD/ATOM_AIRMONT_MID/g' \ -e 's/ATOM_DENVERTON/ATOM_GOLDMONT_X/g' \ -e 's/ATOM_GEMINI_LAKE/ATOM_GOLDMONT_PLUS/g' ${i} done Signed-off-by: Peter Zijlstra (Intel) Cc: Alexander Shishkin Cc: Arnaldo Carvalho de Melo Cc: Jiri Olsa Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Stephane Eranian Cc: Thomas Gleixner Cc: Vince Weaver Cc: dave.hansen@linux.intel.com Cc: len.brown@intel.com Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner [bwh: Backported to 4.9: - Drop changes to CPU IDs that weren't already included - Adjust context] Signed-off-by: Ben Hutchings Signed-off-by: Greg Kroah-Hartman

powercap/intel_rapl: fix and tidy up error handling

2017-01-19T19:18:07+00:00

commit cb43f81b8489dcb87555e16c17453f0a9fa690f2 upstream. Commit e1399ba20eee ("powercap / RAPL: handle missing MSRs") added contraint_to_pl() function to return index into an array. But it can potentially return -EINVAL if powercap layer sends an out of range constraint ID. This patch adds sanity check. Unnecessary RAPL domain pointer check is removed since it must be initialized before calling rapl_unit_xlate(). Fixes: e1399ba20eee ("powercap / RAPL: handle missing MSRs") Reported-by: Odzioba, Lukasz Reported-by: Koss, Marcin Signed-off-by: Jacob Pan Signed-off-by: Rafael J. Wysocki Signed-off-by: Greg Kroah-Hartman

x86/cpu: Rename Merrifield2 to Moorefield

2016-09-08T06:13:08+00:00

Merrifield2 is actually Moorefield. Rename it accordingly and drop tail digit from Merrifield1. Signed-off-by: Andy Shevchenko Cc: Dave Hansen Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/20160906184254.94440-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar

powercap / RAPL: Add support for Ivy Bridge server

2016-06-25T01:00:58+00:00

It's confirmed that RAPL works as expected on Ivy Bridge servers. Tested against processor: Intel(R) Xeon(R) CPU E5-2697 v2 @2.70GHz Signed-off-by: Xiaolong Wang Signed-off-by: Rafael J. Wysocki

powercap / RAPL: add support for Denverton

2016-06-14T23:37:48+00:00

Denverton micro server is Atom-based, but its RAPL interface is compatible with Core-based CPUs. Signed-off-by: Jacob Pan Signed-off-by: Rafael J. Wysocki

Merge back earlier powercap material for v4.8.

2016-06-14T23:37:21+00:00

powercap / RAPL: handle missing MSRs

2016-06-14T23:33:50+00:00

Some RAPL MSRs may not exist on some CPUs, we need to continue the topology detection and enumerate what is available. This patch handles the missing MSRs, then reports to the powercap layer only the features available. Signed-off-by: Jacob Pan Signed-off-by: Rafael J. Wysocki

powercap / RAPL: reduce message loglevel

2016-06-10T00:32:32+00:00

Since the RAPL interface is not architectual, its enumeration depends on poking MSRs instead of using the CPUID method. In KVM guests, the RAPL driver probe will fail and emit the following message for every CPU: "no valid rapl domains found in package" This patch converts the warning to a debug message only (still return -ENODEV so that RAPL does not run in KVM guests). Signed-off-by: Jacob Pan [ rjw: Subject & changelog ] Signed-off-by: Rafael J. Wysocki

x86, powercap, rapl: Add Skylake Server model number

2016-06-08T11:03:25+00:00

SKX uses similar RAPL interface as Broadwell server according to Jacob Pan. Signed-off-by: Dave Hansen Cc: Andy Lutomirski Cc: Borislav Petkov Cc: Brian Gerst Cc: Dave Hansen Cc: Denys Vlasenko Cc: H. Peter Anvin Cc: Jacob Pan Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rafael J. Wysocki Cc: Thomas Gleixner Cc: jacob.jun.pan@intel.com Cc: linux-pm@vger.kernel.org Link: http://lkml.kernel.org/r/20160603001955.38E1E684@viggo.jf.intel.com Signed-off-by: Ingo Molnar