kernel/linux.git/drivers/pinctrl/sunxi, branch linux-5.9.y

pinctrl: sunxi: handle probe defferal

2020-04-16T08:23:02+00:00

When checking the logs on my sun8i-a33-olinuxino I saw: sun8i-a23-r-pinctrl 1f02c00.pinctrl: Reset controller missing but this driver was working after. This message is just here because the reset controller was still not probed. So don't say anything if the return code say to wait. Signed-off-by: Corentin Labbe Link: https://lore.kernel.org/r/1585818532-23051-1-git-send-email-clabbe@baylibre.com Acked-by: Maxime Ripard Signed-off-by: Linus Walleij

pinctrl: sunxi: Mask non-wakeup IRQs on suspend

2020-02-21T14:16:08+00:00

The pin controller hardware does not distinguish IRQs intended for wakeup from other IRQs, so we must mask non-wakeup IRQs in software to prevent inadvertent wakeups. This is accomplished at the irqchip level via the IRQCHIP_MASK_ON_SUSPEND flag. Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.org Acked-by: Maxime Ripard Signed-off-by: Linus Walleij

pinctrl: sunxi: Forward calls to irq_set_irq_wake

2020-02-21T14:14:24+00:00

The pinctrl irqchip may be connected to an irqchip that implements the .irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs. In order for GPIOs to be able to trigger wakeup, the IRQ from the pinctrl to the upper irqchip must also be enabled for wakeup. Since the kernel's IRQ core already manages the "wake_depth" of each IRQ, no additional accounting is needed in the pinctrl driver. Signed-off-by: Samuel Holland Link: https://lore.kernel.org/r/20200117213340.47714-1-samuel@sholland.org Acked-by: Maxime Ripard Signed-off-by: Linus Walleij

pinctrl: sunxi: sun50i-h5 use platform_irq_count

2020-01-07T08:55:33+00:00

platform_irq_count() is the more generic way (independent of device trees) to determine the count of available interrupts. So use this instead. As platform_irq_count() might return an error code (which of_irq_count doesn't) some additional handling is necessary. Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/1576672860-14420-2-git-send-email-peng.fan@nxp.com Signed-off-by: Linus Walleij

pinctrl: use devm_platform_ioremap_resource() to simplify code

2019-11-05T14:33:40+00:00

devm_platform_ioremap_resource() internally have platform_get_resource() and devm_ioremap_resource() in it. So instead of calling them separately use devm_platform_ioremap_resource() directly. Signed-off-by: YueHaibing Acked-by: Thierry Reding Acked-by: Neil Armstrong Acked-by: Manivannan Sadhasivam Acked-by: Jesper Nilsson Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/20191104142654.39256-1-yuehaibing@huawei.com Signed-off-by: Linus Walleij

pinctrl: sunxi: v3s: introduce support for V3

2019-08-05T10:35:29+00:00

Introduce the GPIO pins that is only available on V3 (not on V3s) to the V3s pinctrl driver. Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/20190728031227.49140-2-icenowy@aosc.io Signed-off-by: Linus Walleij

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

pinctrl: sunxi: Support I/O bias voltage setting on H6

2019-04-23T10:31:42+00:00

H6 SoC has a "pio group withstand voltage mode" register (datasheet description), that needs to be used to select either 1.8V or 3.3V I/O mode, based on what voltage is powering the respective pin banks and is thus used for I/O signals. Add support for configuring this register according to the voltage of the pin bank regulator (if enabled). This is similar to the support for I/O bias voltage setting patch for A80 and the same concerns apply. See: commit 402bfb3c1352 ("Support I/O bias voltage setting on A80") Signed-off-by: Ondrej Jirman Acked-by: Maxime Ripard Signed-off-by: Linus Walleij

pinctrl: sunxi: Prepare for alternative bias voltage setting methods

2019-04-23T10:29:21+00:00

H6 has a different I/O voltage bias setting method than A80. Prepare existing code for using alternative bias voltage setting methods. Signed-off-by: Ondrej Jirman Acked-by: Maxime Ripard Signed-off-by: Linus Walleij

pinctrl: sunxi: Allow to disable pinctrl drivers

2019-04-04T03:55:54+00:00

Our pinctrl drivers are consisting of some common code, and big pin tables that are SoC-specific. This is fine in most cases, but when you want to reduce the size of the particular kernel image, those big tables are, well, quite big. We haven't had the option to disable them in the past since they were hidden Kconfig options based on the SoC support. However, that granularity isn't great since we don't have one Kconfig option per-SoC, but rather one by family. Make those options selectable by the user so that they can disable it if needed, while keeping the current default to not change the standard case. Acked-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard Signed-off-by: Linus Walleij